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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > MKE04Z8VWJ4

MKE04Z8VWJ4 鐧�(f膩)甯冩檪闁� 鏅傞枔锛�2025/4/30 16:00:11 鏌ョ湅 闁辫畝锛�28

MKE04Z8VWJ4鏄熀浜嶢RM Cortex-M0+鍏�(n猫i)鏍哥殑32浣嶅井鎺у埗鍣�锛屽爆浜嶯XP鐨凨inetis E绯诲垪銆傝┎鑺墖瑷�(sh猫)瑷堢敤浜庝綆鍔熻�楀拰楂樻�ц兘宓屽叆寮忔噳(y墨ng)鐢�锛屽叿鏈夎睈瀵岀殑澶栬ō(sh猫)鍜岄珮鏁堢殑铏曠悊鑳藉姏銆�
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鍙冩暩(sh霉)

鏍稿績锛欰RM Cortex-M0+
銆�銆�宸ヤ綔闋荤巼锛氭渶楂�48 MHz
銆�銆�Flash瀛樺劜鍣細8 KB
銆�銆�SARAM锛�2 KB
銆�銆�I/O绔彛锛�28鍊�
銆�銆�ADC閫氶亾鏁�(sh霉)锛�8閫氶亾
銆�銆�瀹氭檪鍣細2鍊�16浣嶅畾鏅傚櫒
銆�銆�UART鎺ュ彛鏁�(sh霉)閲忥細1
銆�銆�SPI鎺ュ彛鏁�(sh霉)閲忥細1
銆�銆�I2C鎺ュ彛鏁�(sh霉)閲忥細1
銆�銆�渚涢浕闆诲鑼冨湇锛�1.71 V 鑷� 3.6 V
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C

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鏇夸唬鍨嬭櫉

MKE02Z8VLC4,MKE04Z16VLC4

mke04z8vwj4鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉
  • 瑭㈠児

mke04z8vwj4鍙冩暩(sh霉)

  • 鐝�(xi脿n)鏈夋暩(sh霉)閲�0鐝�(xi脿n)璨ㄦ煡鐪嬩氦鏈�
  • 鍍规牸1 : 锟�24.25000绠′欢
  • 绯诲垪Kinetis KE04
  • 鍖呰绠′欢
  • 鐢�(ch菐n)鍝佺媭鎱�(t脿i)鍦ㄥ敭
  • 鏍稿績铏曠悊鍣�ARM? Cortex?-M0+
  • 鍏�(n猫i)鏍歌(gu墨)鏍�32 浣嶅柈鏍�
  • 閫熷害48MHz
  • 閫ｆ帴鑳藉姏I2C锛孲PI锛孶ART/USART
  • 澶栬ō(sh猫)LVD锛孭WM锛學DT
  • I/O 鏁�(sh霉)18
  • 绋嬪簭瀛樺劜瀹归噺8KB锛�8K x 8锛�
  • 绋嬪簭瀛樺劜鍣ㄩ鍨�闁冨瓨
  • EEPROM 瀹归噺-
  • RAM 澶у皬1K x 8
  • 闆诲 - 渚涢浕 (Vcc/Vdd)2.7V ~ 5.5V
  • 鏁�(sh霉)鎿�(j霉)杞�(zhu菐n)鎻涘櫒A/D 10x12b; D/A 2x6b
  • 鎸暕鍣ㄩ鍨�鍏�(n猫i)閮�
  • 宸ヤ綔婧害-40掳C ~ 105掳C锛圱A锛�
  • 瀹夎椤炲瀷琛ㄩ潰璨艰鍨�
  • 灏佽/澶栨20-SOIC锛�0.295"锛�7.50mm 瀵級
  • 渚涙噳(y墨ng)鍟嗗櫒浠跺皝瑁�20-SOIC