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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > MK10DN512VLL10

MK10DN512VLL10 鐧�(f膩)甯冩檪闁� 鏅傞枔锛�2023/7/10 17:37:09 鏌ョ湅 闁辫畝锛�806

鎻忚堪

MK10DN512VLL10鏄竴娆惧熀浜嶢RMCortex-M4RISC鏋舵(g貌u)鍏�(n猫i)鏍哥殑32浣岾inetis K1x Baseline寰帶鍒跺櫒锛屾渶楂橀亱琛岄牷鐜囩偤100MHz銆傝┎鍣ㄤ欢鍖呭惈512kB鍏�(n猫i)閮ㄩ杻瀛樸��128kB鍏�(n猫i)閮≧AM銆佸叐鍊�16浣峉ARA/D杞�(zhu菐n)鎻涘櫒銆佷竴鍊�12浣岲/A杞�(zhu菐n)鎻涘櫒鍜�70鍊嬮�氱敤I/O寮曡叧銆傝┎鍣ㄤ欢閭勫叿鏈夐�氫俊鎺ュ彛锛屽浜斿�婾ART妯″銆佷笁鍊婼PI妯″銆佸叐鍊婭2C妯″鍜屼竴鍊婭2S妯″銆�

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MK10DN512VLL10

鎻忚堪

IC MCU 32BIT 512KB闁冨瓨100LQFP

鍒嗛

闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-寰帶鍒跺櫒

鍒堕�犲晢

鎭╂櫤娴﹀崐灏�(d菐o)楂�

绯诲垪

Kinetis K10

闆诲-闆绘簮(Vcc / Vdd)

1.71V?3.6V

宸ヤ綔婧害

-40掳C?105掳C(TA)

瀹夎椤炲瀷

琛ㄩ潰璨艰

鍖呰/绠�

100-LQFP

渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�

100-LQFP(14x14)

鍩烘湰闆朵欢铏�

MK10DN512

鐢�(ch菐n)鍝佸湒鐗�

MK10DN512VLL10

MK10DN512VLL10

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鐢�(ch菐n)鍝佸垎椤�

ARM寰帶鍒跺櫒-MCU

绯诲垪

K10_100

鏍稿績

ARMCortexM4

绋嬪簭瀛樺劜鍣ㄥぇ灏�

512KB

鏁�(sh霉)鎿�(j霉)绺界窔瀵害

32浣�

ADC鍒嗚鲸鐜�

16浣�

鏈�澶ф檪閻橀牷鐜�

100鍏嗚但

鏁�(sh霉)鎿�(j霉)RAM澶у皬

128KB

宸ヤ綔闆绘簮闆诲

3.3浼�

绋嬪簭瀛樺劜鍣ㄩ鍨�

闁冨厜

鎺ュ彛椤炲瀷

CAN锛孲PI锛孖2C锛孶ART

妯℃摤闆绘簮闆诲

3.3浼�

杓稿叆/杓稿嚭闆诲

3.3浼�

A/D杞�(zhu菐n)鎻涘櫒鏁�(sh霉)閲�

2

ADC閫氶亾鏁�(sh霉)

2

I2C閫氶亾鏁�(sh霉)

2

I/O鏁�(sh霉)閲�

70

PWM閫氶亾鏁�(sh霉)

8

SPI閫氶亾鏁�(sh霉)

3

瑷堟檪鍣�/瑷堟暩(sh霉)鍣ㄦ暩(sh霉)閲�

13

UART閫氶亾鏁�(sh霉)

5

鎸暕鍣ㄩ鍨�

鍏�(n猫i)閮�

楂樺害

1.7姣背

闀峰害

14姣背

瀵害

14姣背

鍖呰

鎵樼洡

瀹夎鏂瑰紡

璨肩墖/璨肩墖

鍖呰/绠�

LQFP-100

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

RoHS鐙�鎱�(t脿i)

绗﹀悎ROHS3

姘村垎鏁忔劅鎬ф按骞�(MSL)

3(168灏忔檪)

鐗归粸

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CAD妯″瀷

MK10DN512VLL10绗﹁櫉

MK10DN512VLL10绗﹁櫉

MK10DN512VLL10鑵冲嵃

MK10DN512VLL10鑵冲嵃

灏佽

MK10DN512VLL10灏佽

MK10DN512VLL10灏佽

mk10dn512vll10鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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mk10dn512vll10鍦栫墖

mk10dn512vll10

mk10dn512vll10鍙冩暩(sh霉)

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