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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XCZU6EG-2FFVC900I

XCZU6EG-2FFVC900I 鐧�(f膩)甯冩檪闁� 鏅傞枔锛�2025/5/10 11:51:10 鏌ョ湅 闁辫畝锛�23

XCZU6EG-2FFVC900I鏄疿ilinx鍏徃鎺ㄥ嚭鐨刄ltraScale+绯诲垪涓殑MPSoC锛堝铏曠悊鍣ㄧ郴绲�(t菕ng)鑺墖锛夊櫒浠�銆傝┎绯诲垪绲�(ji茅)鍚堜簡鍙法绋嬮倧杓�銆侀珮鎬ц兘铏曠悊鍣ㄥ拰闆嗘垚鐨勭‖浠跺姞閫熷櫒锛岄仼鐢ㄤ簬寰�(f霉)闆滅殑鎳�(y墨ng)鐢ㄥ牬鏅�銆俋CZU6EG鍏锋湁680钀�嬬郴绲�(t菕ng)閭忚集鍠厓锛屾敮鎸佸绋帴鍙ｅ崝(xi茅)璀�锛屽苟涓斿収(n猫i)缃洐鏍窤RM Cortex-A53铏曠悊鍣ㄥ拰闆欐牳ARM Cortex-R5铏曠悊鍣�锛岄仼鍚堥渶瑕侀珮瑷�(j矛)绠楁�ц兘鍜屽(sh铆)鏅傝檿鐞嗚兘鍔涚殑鎳�(y墨ng)鐢�銆�
銆�銆�閫欐鑺墖閲囩敤16nm FinFET宸ヨ棟鍒堕�狅紝鍏峰倷浣庡姛鑰楀拰楂樻�ц兘鐨勭壒榛�(di菐n)锛屽唬娉涙噳(y墨ng)鐢ㄤ簬宓屽叆寮忚瑕�銆佸伐妤�(y猫)鑷嫊鍖�銆侀�氫俊鍩虹(ch菙)瑷�(sh猫)鏂戒互鍙婅埅绌鸿埅澶╄垏鍦嬮槻闋�(l菒ng)鍩熴��

鍙冩暩(sh霉)

鍨嬭櫉锛歑CZU6EG-2FFVC900I
銆�銆�绯诲垪锛歓ynq UltraScale+ MPSoC
銆�銆�宸ヨ棟绡�(ji茅)榛�(di菐n)锛�16nm
銆�銆�閭忚集鍠厓鏁�(sh霉)锛�680钀�
銆�銆�CPU锛氶洐鏍窤RM Cortex-A53 @ 1.0GHz
銆�銆�瀵�(sh铆)鏅傝檿鐞嗗櫒锛氶洐鏍窤RM Cortex-R5 @ 600MHz
銆�銆�瀛樺劜鍣細楂橀仈(d谩)4GB DDR4/LPDDR4
銆�銆�灏佽椤炲瀷锛欶FVC900
銆�銆�閰嶇疆妯″紡锛歈SPI/SD/eMMC/JTAG
銆�銆�I/O闆诲锛�1.8V/1.5V/1.2V
銆�銆�鏈�澶у姛鑰楋細灏忎簬10W锛堝吀鍨嬪�硷級

鐗规��

XCZU6EG-2FFVC900I鐨勪富瑕佺壒榛�(di菐n)鏄叾楂樺害闆嗘垚鎬у拰闈堟椿鎬�銆傚畠灏囧彲绶ㄧ▼閭忚集璩囨簮鑸囧挤(qi谩ng)澶х殑宓屽叆寮忚檿鐞嗗櫒鐩哥祼(ji茅)鍚�锛屽厑瑷辩敤鎴跺湪鍠�嬭姱鐗囦笂瀵�(sh铆)鐝�(xi脿n)寰�(f霉)闆滅殑杌熺‖浠跺崝(xi茅)鍚岃ō(sh猫)瑷�(j矛)銆�
銆�銆�1. 楂樺害闆嗘垚锛氬寘鍚洐鏍窤53铏曠悊鍣ㄧ敤浜庨�氱敤瑷�(j矛)绠椾换鍕�(w霉)锛岄洐鏍窻5铏曠悊鍣ㄧ敤浜庡(sh铆)鏅傛帶鍒朵换鍕�(w霉)锛屼互鍙婂ぇ閲忓彲绶ㄧ▼閭忚集璩囨簮鐢ㄤ簬瀹氬埗纭欢鍔犻�熷姛鑳�銆�
銆�銆�2. 澶氱ó鎺ュ彛鏀寔锛氭敮鎸丳CIe Gen3銆乁SB 3.0銆丼ATA 3.0銆佸崈鍏嗕互澶恫(w菐ng)绛夊绋珮閫熸帴鍙ｅ崝(xi茅)璀�銆�
銆�銆�3. 浣庡姛鑰楁灦妲�(g貌u)锛氶�氶亷鍏堥��(j矛n)鐨�16nm鍒剁▼鎶�琛�(sh霉)锛屽(sh铆)鐝�(xi脿n)浜嗗崜瓒婄殑鎬ц兘鍚屾檪淇濇寔杓冧綆鐨勫姛鑰楁按骞�銆�
銆�銆�4. 瀹夊叏鎬у寮�(qi谩ng)锛氭彁渚涚‖浠跺姞瀵嗗紩鎿庡拰瀹夊叏寮曞皫(d菐o)閬搁爡(xi脿ng)锛岀⒑淇濈郴绲�(t菕ng)鐨勫畨鍏ㄦ��銆�
銆�銆�5. 寤ｆ硾鎳�(y墨ng)鐢ㄨ寖鍦嶏細寰炲伐妤�(y猫)鐗╄伅(li谩n)缍�(w菐ng)鍒伴倞绶ｈ▓(j矛)绠�锛屽啀鍒板京(f霉)闆滅殑宓屽叆寮忕郴绲�(t菕ng)锛屽潎鍙娇鐢ㄦ鑺墖瀹屾垚楂樻晥閮ㄧ讲銆�

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XCZU6EG-2FFVC900I閬╃敤浜庡绋珮绔噳(y墨ng)鐢ㄥ牬鏅細
銆�銆�1. 宓屽叆寮忚瑕虹郴绲�(t菕ng)锛氬姗�(j墨)鍣ㄨ瑕�銆佽嚜鍕曢椐涜紨鍔╃郴绲�(t菕ng)绛�锛屽埄鐢ㄥ叾寮�(qi谩ng)澶х殑鍦栧儚铏曠悊鑳藉姏鍜岄潏娲荤殑纭欢鍔犻�熴��
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栵細鍖呮嫭PLC鎺у埗鍣�銆佹(j墨)鍣ㄤ汉鎺у埗绯荤当(t菕ng)浠ュ強鍏朵粬闇�瑕侀珮鎬ц兘瀵�(sh铆)鏅傝檿鐞嗙殑浠诲嫏(w霉)銆�
銆�銆�3. 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂斤細渚嬪灏忓瀷鍩虹珯銆佺恫(w菐ng)绲�(lu貌)浜ゆ彌瑷�(sh猫)鍌欑瓑锛屽彲浠ュ�熷姪鍏惰睈瀵岀殑鎺ュ彛璩囨簮鍜屼綆寤堕伈鐗规��銆�
銆�銆�4. 鑸┖鑸ぉ鑸囧湅闃诧細鐢变簬鍏堕珮鍙潬鎬у強鎶楄蓟灏勯伕鍨嬬増鏈殑瀛樺湪锛岄潪甯搁仼鍚堝湪妤电鐠�(hu谩n)澧冧笅閬�(y霉n)琛岀殑闂�(gu膩n)閸典换鍕�(w霉)绯荤当(t菕ng)銆�
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鏇夸唬鍨嬭櫉

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xczu6eg-2ffvc900i鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉
  • 瑭㈠児

xczu6eg-2ffvc900i鍙冩暩(sh霉)

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  • 鍍规牸1 : 锟�32,131.76000鎵樼洡
  • 绯诲垪Zynq? UltraScale+? MPSoC EG
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  • 鏋舵(g貌u)MCU锛孎(xi脿n)PGA
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  • 闁冨瓨澶у皬-
  • RAM 澶у皬256KB
  • 澶栬ō(sh猫)DMA锛學DT
  • 閫ｆ帴鑳藉姏CANbus锛孍BI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG
  • 閫熷害533MHz锛�600MHz锛�1.3GHz
  • 涓昏灞��Zynq?UltraScale+? FPGA锛�469K+ 閭忚集鍠厓
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  • 灏佽/澶栨900-BBGA锛孎(xi脿n)CBGA
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