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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XCZU6CG-L1FFVC900I

XCZU6CG-L1FFVC900I 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2025/5/10 13:14:35 鏌ョ湅 闁辫畝锛�22

XCZU6CG-L1FFVC900I 鏄竴娆剧敱 Xilinx锛堣辰闈堟�濓級鍏徃鐢熺敘(ch菐n)鐨勯珮绔� FPGA 鑺墖锛屽爆浜� Zynq UltraScale+ MPSoC 绯诲垪銆傝┎绯诲垪鑺墖闆嗘垚浜� ARM 铏曠悊鍣ㄨ垏鍙法绋嬮倧杓硣婧�锛岄仼鐢ㄤ簬闇�瑕侀珮鎬ц兘瑷�(j矛)绠楀拰闈堟椿纭欢鍔犻�熺殑鍫存櫙銆俋CZU6CG 鐗堟湰鍖呭惈涓�鍊�(g猫)闆欐牳 ARM Cortex-A53 鍜屼竴鍊�(g猫)瀵�(sh铆)鏅�(sh铆)铏曠悊鍠厓锛圧PU锛夛紝鍩轰簬 16nm 鍒剁▼宸ヨ棟鍒堕��锛屾敮鎸佸绋帴鍙ｅ拰鍗�(xi茅)璀�锛屽唬娉涙噳(y墨ng)鐢ㄤ簬宸ユキ(y猫)鑷嫊(d貌ng)鍖�銆侀�氫俊銆佹苯杌婇浕瀛愪互鍙婇倞绶ｈ▓(j矛)绠楅牁(l菒ng)鍩�銆�
銆�銆�姝ゅ瀷铏�(h脿o)涓殑鈥淟1鈥濊〃绀烘�ц兘绛夌礆(j铆)锛屸�淔FVC900鈥濈偤灏佽椤炲瀷锛屽叿鏈� 900 鐞冩暩(sh霉)锛岄仼鍚堥珮瀵嗗害瑷�(sh猫)瑷�(j矛)銆�

鍙冩暩(sh霉)

鍒剁▼宸ヨ棟锛�16nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 278K
銆�銆�ARM 鍏�(n猫i)鏍革細闆欐牳 ARM Cortex-A53锛堥亱(y霉n)琛岄牷鐜囨渶楂樺彲閬�(d谩) 1.0 GHz锛�
銆�銆�瀵�(sh铆)鏅�(sh铆)铏曠悊鍠厓锛氶洐鏍� ARM Cortex-R5
銆�銆�瀛樺劜(ch菙)鍣細楂橀仈(d谩) 14.1 Mb 宓屽叆寮忓瓨鍎�(ch菙)鍣�
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2210
銆�銆�I/O 鏁�(sh霉)閲忥細鏈�澶� 300 鍊�(g猫)鐢ㄦ埗 I/O
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�灏佽椤炲瀷锛欶FVC900

鐗规��

XCZU6CG-L1FFVC900I 鍏锋湁寮�(qi谩ng)澶х殑鐣版(g貌u)铏曠悊鑳藉姏锛屽叾涓昏鐗规�у寘鎷細
銆�銆�1. 闆嗘垚闆欐牳 ARM Cortex-A53 鎳�(y墨ng)鐢ㄨ檿鐞嗗櫒鍜岄洐鏍� ARM Cortex-R5 瀵�(sh铆)鏅�(sh铆)铏曠悊鍣紝鎻愪緵楂樻晥鐨勬噳(y墨ng)鐢ㄨ檿鐞嗗拰瀵�(sh铆)鏅�(sh铆)鎺у埗鍔熻兘銆�
銆�銆�2. 鎻愪緵璞愬瘜鐨勫彲绶ㄧ▼閭忚集璩囨簮锛岃兘澶�?q奴)宕縁(xi脿n)瀹氬埗鍖栫殑纭欢鍔犻�熸ā濉�銆�
銆�銆�3. 鏀寔澶氱ó楂橀�熸帴鍙ｏ紝渚嬪 PCIe Gen3銆乁SB 3.0銆丼ATA 鍜屽崈鍏嗕互澶恫(w菐ng)绛�锛屾豢瓒充笉鍚屾噳(y墨ng)鐢ㄥ牬鏅殑闇�姹傘��
銆�銆�4. 鍏�(n猫i)缃� H.264/H.265 瑕栭牷绶ㄨВ纰煎柈鍏�锛岄仼鐢ㄤ簬澶氬獟楂旇檿鐞嗕换鍕�(w霉)銆�
銆�銆�5. 鏀寔 LPDDR4 鍜� DDR4 鍏�(n猫i)瀛樻帶鍒跺櫒锛屽叿鍌欐洿楂樼殑甯跺鍜屾洿浣庣殑鍔熻��銆�
銆�銆�6. 鍏�(n猫i)宓屽畨鍏ㄥ暉鍕�(d貌ng)姗�(j墨)鍒讹紝纰轰繚绯荤当(t菕ng)閬�(y霉n)琛岀殑瀹夊叏鎬у拰鍙潬鎬�銆�
銆�銆�7. 鎻愪緵闈堟椿鐨勯浕婧愮鐞嗘柟妗�锛屽彲鏍规摎(j霉)瀵�(sh铆)闅涢渶姹傚嫊(d貌ng)鎱�(t脿i)瑾�(di脿o)鏁村姛鑰�銆�

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XCZU6CG-L1FFVC900I 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 宸ユキ(y猫)鑷嫊(d貌ng)鍖栵細鐢ㄤ簬宸ユキ(y猫)鎺у埗銆佹(j墨)鍣ㄤ汉鎶�琛�(sh霉)浠ュ強宸ユキ(y猫)鐗╄伅(li谩n)缍�(w菐ng)瑷�(sh猫)鍌欍��
銆�銆�2. 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂斤細閬╃敤浜庣劇绶氬熀绔�銆佺恫(w菐ng)绲�(lu貌)浜ゆ彌姗�(j墨)鍜岃矾鐢卞櫒绛夐�氫俊瑷�(sh猫)鍌欍��
銆�銆�3. 姹借粖闆诲瓙锛氭敮鎸侀珮绱�(j铆)椐曢杓斿姪绯荤当(t菕ng)锛圓DAS锛�銆佷俊鎭妯傜郴绲�(t菕ng)浠ュ強杌婅伅(li谩n)缍�(w菐ng)鎶�琛�(sh霉)銆�
銆�銆�4. 閱�(y墨)鐧傝ō(sh猫)鍌欙細鐢ㄤ簬褰卞儚铏曠悊銆佽ê鏂疯ō(sh猫)鍌欏拰閬�(yu菐n)绋嬮啱(y墨)鐧傚钩鑷�(t谩i)銆�
銆�銆�5. 閭婄罚瑷�(j矛)绠楋細浣滅偤閭婄罚绡�(ji茅)榛�(di菐n)鐨勪富鎺ц姱鐗囷紝鍩�(zh铆)琛屾湰鍦�?c谩i)?sh霉)鎿�(j霉)铏曠悊鍜屽垎鏋愪换鍕�(w霉)銆�
銆�銆�6. 瑕栭牷鐩�(ji膩n)鎺э細鍒╃敤鍏�(n猫i)缃闋荤法瑙ｇ⒓鍠厓瀵�(sh铆)鐝�(xi脿n)楂樻竻瑕栭牷娴佺殑瀵�(sh铆)鏅�(sh铆)铏曠悊鍜屽偝杓�銆�

鏇夸唬鍨嬭櫉(h脿o)

XCZU7EV-2FFVC1156I
銆�銆�XCZU5EV-1FFVC900I
銆�銆�XCZU4CG-1FFVC896I

xczu6cg-l1ffvc900i鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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  • 寤犲晢
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭㈠児(ji脿)

xczu6cg-l1ffvc900i鍙冩暩(sh霉)

  • 鐝�(xi脿n)鏈夋暩(sh霉)閲�0鐝�(xi脿n)璨ㄦ煡鐪嬩氦鏈�
  • 鍍�(ji脿)鏍�1 : 锟�25,990.93000鎵樼洡
  • 绯诲垪Zynq? UltraScale+? MPSoC CG
  • 鍖呰鎵樼洡
  • 鐢�(ch菐n)鍝佺媭鎱�(t脿i)鍦ㄥ敭
  • 鏋舵(g貌u)MCU锛孎(xi脿n)PGA
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  • 闁冨瓨澶у皬-
  • RAM 澶у皬256KB
  • 澶栬ō(sh猫)DMA锛學DT
  • 閫ｆ帴鑳藉姏CANbus锛孍BI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG
  • 閫熷害500MHz锛�1.2GHz
  • 涓昏灞��Zynq?UltraScale+? FPGA锛�469K+ 閭忚集鍠厓
  • 宸ヤ綔婧害-40掳C ~ 100掳C锛圱J锛�
  • 灏佽/澶栨900-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗗櫒浠跺皝瑁�900-FCBGA锛�31x31锛�