鍨嬭櫉(h脿o)锛歑CVU11P-2FSGD2104E
銆�銆�鍒剁▼宸ヨ棟锛�16nm
銆�銆�FPGA绯诲垪锛歏irtex UltraScale+
銆�銆�閰嶇疆闁冨瓨锛氫笉闆嗘垚澶栭儴閰嶇疆闁冨瓨
銆�銆�I/O 鏁�(sh霉)閲忥細绱� 1728 鍊�(g猫)鐢ㄦ埗 I/O
銆�銆�閭忚集鍠�鍏冿細绱� 580K
銆�銆�DSP Slice锛氱磩 6800 鍊�(g猫)
銆�銆�Block RAM锛氱磩 35MB
銆�銆�楂橀�熸敹鐧�(f膩)鍣ㄩ�熺巼锛氭渶楂橀仈(d谩) 32.75Gbps
銆�銆�HBM 瀹归噺锛氶珮閬�(d谩) 8GB
銆�銆�灏佽�濋�炲瀷锛欶SGD2104E
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏細宸ユ��(y猫)绱�(j铆)锛�-40掳C 鑷� +100掳C锛�

1. 楂樻�ц兘鏋舵��(g貌u)锛氬熀浜� UltraScale+ 鏋舵��(g貌u)锛屾彁渚涗簡姣斿墠浠ｇ敘(ch菐n)鍝佹洿楂樼殑鏅�(sh铆)閻橀牷鐜囧拰鏇翠綆鐨勫欢閬�銆�
銆�銆�2. 鍏�(n猫i)缃� HBM锛歑CVU11P 闆嗘垚浜嗛珮甯跺��瀛樺劜(ch菙)鍣�锛屼娇鏁�(sh霉)鎿�(j霉)鍌宠几甯跺��閬�(d谩)鍒版暩(sh霉)鐧� GB/s锛岄潪甯搁仼鍚堥渶瑕佸ぇ閲忔暩(sh霉)鎿�(j霉)铏曠悊鐨勬噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆�
銆�銆�3. 寮�(qi谩ng)澶х殑浜掕伅(li谩n)鑳藉姏锛氭敮鎸佸�氬��(xi茅)璀伴珮閫熶覆琛屾敹鐧�(f膩)鍣�锛屽寘鎷� PCIe Gen4銆佷互澶�缍�(w菐ng) MAC 鍜� Interlaken 绛夈��
銆�銆�4. 鍙�鎿�(ku貌)灞曟�э細閫氶亷(gu貌) ACAP锛堣嚜閬╂噳(y墨ng)瑷�(j矛)绠楀姞閫熷钩鑷�(t谩i)锛夌悊蹇�锛屽彲浠ラ潏娲诲湴閫�(j矛n)琛岀‖浠堕噸閰嶇疆浠ユ豢瓒充笉鍚岀殑瑷�(j矛)绠楅渶姹�銆�
銆�銆�5. 浣庡姛鑰楄ō(sh猫)瑷�(j矛)锛氱洝绠℃槸楂樻�ц兘 FPGA锛屼絾寰楃泭浜� 16nm 宸ヨ棟锛屾暣楂斿姛鑰楀緱鍒颁簡鏈夋晥鎺у埗銆�
銆�銆�6. 瀹夊叏鍔熻兘锛氬叿鍌欐瘮鐗规祦鍔犲瘑鍜岃獚(r猫n)璀夊姛鑳�锛屼繚闅� IP 鍜屾暩(sh霉)鎿�(j霉)鐨勫畨鍏ㄦ��銆�

1. 鏁�(sh霉)鎿�(j霉)涓�蹇冿細鐢ㄤ簬姗�(j墨)鍣ㄥ��(xu茅)缈�(x铆)鎺ㄧ悊銆佽�栭牷杞�(zhu菐n)纰笺�佹暩(sh霉)鎿�(j霉)搴�(k霉)鍔犻�熺瓑浠诲嫏(w霉)銆�
銆�銆�2. 缍�(w菐ng)绲�(lu貌)閫氫俊锛氭敮鎸� 5G 鍩虹珯銆佹牳蹇冪恫(w菐ng)浠ュ強鍏朵粬楂樻�ц兘缍�(w菐ng)绲�(lu貌)瑷�(sh猫)鍌欓枊(k膩i)鐧�(f膩)銆�
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銆�銆�5. 閱�(y墨)鐧傛垚鍍忥細瓒呰伈娉�銆丆T 鎺冩弿绛夐啱(y墨)鐧傚奖鍍忚檿鐞嗐��
銆�銆�6. 鑸�绌鸿埅澶╄垏鍦�(gu贸)闃诧細淇¤櫉(h脿o)铏曠悊銆侀浄閬�(d谩)绯荤当(t菕ng)绛夐棞(gu膩n)閸甸牁(l菒ng)鍩熴��

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