XCVU095-2FFVE1924I 鏅�(sh铆)闁擄細2025/6/4 8:48:06 闁辫畝锛�7

XCVU095-2FFVE1924I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� UltraScale+ 绯诲垪 FPGA 鑺墖锛屽熀浜� 16nm FinFET 鍒剁▼宸ヨ棟銆傝┎鍣ㄤ欢灏堢偤楂樺付瀵�銆侀珮鎬ц兘瑷�(j矛)绠楀拰缍�(w菐ng)绲�(lu貌)鎳�(y墨ng)鐢ㄨō(sh猫)瑷�(j矛)锛屾彁渚涘ぇ閲忕殑閭忚集璩囨簮銆侀珮閫熸敹鐧�(f膩)鍣ㄤ互鍙婅睈瀵岀殑瀛樺劜(ch菙)鍣ㄦ帴鍙ｉ伕闋�(xi脿ng)銆�
銆€銆€姝ゅ瀷铏熶腑鐨� XCVU 琛ㄧず Virtex UltraScale+ 绯诲垪锛�095 鎸囧畾鍏烽珨鐨勮姱鐗囪(gu墨)妯�锛�2 琛ㄧず閫熷害绛夌礆锛孎(xi脿n)FVE1924 鏄皝瑁濋鍨嬪強寮曡叧鏁�(sh霉)锛岃€� I 琛ㄧず鍟嗘キ(y猫)绱氭韩搴﹁寖鍦嶃€�

鍙冩暩(sh霉)

閭忚集鍠厓锛氱磩 95 钀€�(g猫)
銆€銆€RAM 璩囨簮锛氱磩 78Mb
銆€銆€DSP Slice 鏁�(sh霉)閲忥細绱� 5800 鍊�(g猫)
銆€銆€I/O 鏁�(sh霉)閲忥細鏈€澶氭敮鎸� 1392 鍊�(g猫)
銆€銆€鏀剁櫦(f膩)鍣ㄩ€熺巼锛氭渶楂橀仈(d谩) 32.75Gbps
銆€銆€宸ヤ綔婧害鑼冨湇锛�0掳C 鑷� 85掳C
銆€銆€灏佽锛欶FVE1924

鐗规€�

XCVU094I 鎻愪緵浜嗘サ楂樼殑鎬ц兘鍜岄潏娲绘€�锛岄仼鍚堢敤浜庢暩(sh霉)鎿�(j霉)涓績鍔犻€熴€侀珮绱氶椐涘摗杓斿姪绯荤当(t菕ng) (ADAS)銆佹(j墨)鍣ㄨ瑕轰互鍙婂叾浠栭珮鎬ц兘瑷�(j矛)绠椾换鍕�(w霉)銆�
銆€銆€瀹冮泦鎴愪簡澶氶€氶亾鐨勯珮閫熶覆琛屾敹鐧�(f膩)鍣�锛岃兘澶�?q奴)宕縁(xi脿n)楂橀仈(d谩) 32.75Gbps 鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼锛屽苟涓旀敮鎸� PCIe Gen4 鍜� CCIX 鍗�(xi茅)璀�銆�
銆€銆€姝ゅ锛岃┎鑺墖鍏�(n猫i)缃ぇ瀹归噺宓屽叆寮� RAM 鍜� DSP Slice锛屽彲婊胯冻寰�(f霉)闆滅殑绠楁硶铏曠悊闇€姹傘€傚湪鍔熻€楀劒(y艒u)鍖栨柟闈�锛岄€氶亷浣跨敤 UltraScale+ 鏋舵(g貌u)鎶€琛�(sh霉)锛孹CVU095 鍦ㄥ嫊(d貌ng)鎱�(t脿i)鍔熻€楀拰闈滄厠(t脿i)鍔熻€椾笂鍧囪〃鐝�(xi脿n)鍑鸿壊銆�
銆€銆€鐐轰簡绨″寲闁嬬櫦(f膩)娴佺▼锛孹ilinx 鎻愪緵浜� Vivado Design Suite 宸ュ叿閺堬紝骞姪鐢ㄦ埗蹇€熼厤缃拰椹�(y脿n)璀� FPGA 瑷�(sh猫)瑷�(j矛)銆�

鎳�(y墨ng)鐢�

XCVU095-2FFVE1924I 涓昏鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆€銆€1. 鏁�(sh霉)鎿�(j霉)涓績鍔犻€熷崱鍜屾湇鍕�(w霉)鍣ㄥ崝(xi茅)鍚岃檿鐞嗗櫒
銆€銆€2. 楂橀€熺恫(w菐ng)绲�(lu貌)浜ゆ彌姗�(j墨)鑸囪矾鐢卞櫒
銆€銆€3. 楂樻竻瑕栭牷铏曠悊鍜屽唬鎾ō(sh猫)鍌�
銆€銆€4. 閱�(y墨)鐧傛垚鍍忕郴绲�(t菕ng)
銆€銆€5. 宸ユキ(y猫)鑷嫊(d貌ng)鍖栨帶鍒跺钩鑷�
銆€銆€6. 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂藉缓瑷�(sh猫)锛屽 5G 鍩虹珯鍜屾绫虫尝闆烽仈(d谩)绯荤当(t菕ng)