XC7Z015-2CLG485 鏅�(sh铆)闁擄細2025/4/30 14:53:49 闁辫畝锛�44

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鍨嬭櫉锛歑C7Z015-2CLG485
銆€銆€閫熷害绛夌礆锛�-2
銆€銆€灏佽褰㈠紡锛欳LG485 (484 寮曡叧)
銆€銆€FPGA 閭忚集鍠厓鏁�(sh霉)閲忥細绱� 15,360
銆€銆€RAM 璩囨簮锛�576KB 鍒嗗竷寮� RAM 鍜� 2.7MB 濉婄媭 RAM
銆€銆€DSP Slice 鏁�(sh霉)閲忥細220
銆€銆€I/O 鏁�(sh霉)閲忥細352
銆€銆€ARM 铏曠悊鍣ㄦ牳蹇冿細闆欐牳 ARM Cortex-A9 MPCore
銆€銆€涓婚牷鑼冨湇锛�667MHz
銆€銆€DDR 鎺у埗鍣細鏀寔 DDR3 鍜� DDR3L 鍏�(n猫i)瀛�
銆€銆€闆绘簮闆诲锛�1.0V 鏍稿績闆诲 / 1.8V I/O 闆诲
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆€銆€鍒剁▼宸ヨ棟锛�28nm

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