鍨嬭櫉(h脿o)锛歑C7S25-1CSGA324C
銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛欰rtix-7
銆�銆�鍒剁▼宸ヨ棟锛�28nm
銆�銆�閭忚集鍠�鍏冿細绱� 25,200 鍊�(g猫)
銆�銆�DSP Slice锛�60 鍊�(g猫)
銆�銆�Block RAM锛氱磩 120KB
銆�銆�閰嶇疆妯″紡锛歋lave Serial, Master SPI
銆�銆�I/O 鏁�(sh霉)閲忥細216
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��0掳C 鑷� 85掳C
銆�銆�灏佽�濆舰寮忥細CSGA324
銆�銆�閫熷害绛夌礆(j铆)锛�-1

XC7S25-1CSGA324C 鎿佹湁楂橀泦鎴愬害鍜岄潏娲绘�э紝鏀�鎸佸�氱ó閰嶇疆閬搁爡(xi脿ng)鍜屾帴鍙ｅ崝(xi茅)璀�銆�
銆�銆�1. 鍏�(n猫i)缃� DSP Slice 鏀�鎸侀珮鏁堜俊铏�(h脿o)铏曠悊锛岄仼鍚堟暩(sh霉)瀛楁烤娉㈠櫒銆丗FT 绛夌畻娉曞��(sh铆)鐝�(xi脿n)銆�
銆�銆�2. 鎻愪緵璞愬瘜鐨� Block RAM 璩囨簮锛屼究浜庢暩(sh霉)鎿�(j霉)绶╁瓨鍜� FIFO 瀵�(sh铆)鐝�(xi脿n)銆�
銆�銆�3. 鏀�鎸佸�氱ó楂橀�熷樊鍒� I/O 妯�(bi膩o)婧�(zh菙n)锛屼緥濡� LVDS 鍜� SSTL锛岄仼鎳�(y墨ng)寰�(f霉)闆滅殑淇¤櫉(h脿o)鐠�(hu谩n)澧�銆�
銆�銆�4. 鍙�閫氶亷(gu貌) JTAG 鎴� SPI 鎺ュ彛閫�(j矛n)琛屼究鎹风殑閰嶇疆鍜岃��(di脿o)瑭︺��
銆�銆�5. 鍔熻�楀劒(y艒u)鍖栬ō(sh猫)瑷�(j矛)锛岄仼鍚堜究鏀滃紡鍜屼綆鍔熻�楁噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆�
銆�銆�6. 闆嗘垚浜嗘檪(sh铆)閻樼�＄悊妯″�婏紙Clock Management Tile锛�锛屾敮鎸� PLL 鍜� DCM 鍔熻兘锛屽彲鐢熸垚绮剧⒑鐨勬檪(sh铆)閻樹俊铏�(h脿o)銆�
銆�銆�7. 鏀�鎸侀儴鍒嗛噸閰嶇疆鍔熻兘锛屽厑瑷卞湪閬�(y霉n)琛屾湡闁撳嫊(d貌ng)鎱�(t脿i)鏇存柊閮ㄥ垎閭忚集闆昏矾銆�
銆�銆�閫欎簺鐗规�т娇寰� XC7S25 鎴愮偤涓�娆惧姛鑳藉挤(qi谩ng)澶т笖闈堟椿鐨� FPGA 鑺�鐗�锛岄仼鍚堝�氱ó寰�(f霉)闆滈浕瀛愮郴绲�(t菕ng)瑷�(sh猫)瑷�(j矛)銆�

XC7S25-1CSGA324C 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栵細瀵�(sh铆)鏅�(sh铆)鎺у埗銆侀亱(y霉n)鍕�(d貌ng)鎺у埗銆佹暩(sh霉)鎿�(j霉)閲囬泦绛�銆�
銆�銆�2. 宓屽叆寮忚�栬��(ju茅)锛氬湒鍍忚檿鐞�銆佺洰妯�(bi膩o)妾㈡脯(c猫)銆佹��(j墨)鍣ㄨ�栬��(ju茅)绛�銆�
銆�銆�3. 閫氫俊瑷�(sh猫)鍌欙細鍩哄付铏曠悊銆佸崝(xi茅)璀拌綁(zhu菐n)鎻�銆佷俊铏�(h脿o)瑾�(di脿o)鍒惰В瑾�(di脿o)绛�銆�
銆�銆�4. 閱�(y墨)鐧傚剙鍣�锛氳秴鑱叉尝鎴愬��銆佸績闆诲湒鍒嗘瀽銆佺敓鐗╀俊铏�(h脿o)铏曠悊绛�銆�
銆�銆�5. 娑堣不(f猫i)椤�(l猫i)闆诲瓙锛氶煶闋�/瑕栭牷铏曠悊銆佹父鎴叉��(j墨)闁�(k膩i)鐧�(f膩)銆佹櫤鑳藉�跺眳鎺у埗绛�銆�
銆�銆�6. 娓�(c猫)瑭﹁垏娓�(c猫)閲忥細绀烘尝鍣�銆佷俊铏�(h脿o)鐧�(f膩)鐢熷櫒銆侀牷璀滃垎鏋愬剙绛�銆�
銆�銆�鐢变簬鍏跺挤(qi谩ng)澶х殑閭忚集璩囨簮鍜岄潏娲荤殑鍙�绶ㄧ▼鑳藉��锛岃┎鑺�鐗囧彲浠ユ豢瓒冲緸绨�(ji菐n)鍠�鍒板��(f霉)闆滅殑鍚勭ó瑷�(sh猫)瑷�(j矛)闇�姹�銆�

XC7S25-2CSGA324C
銆�銆�XC7S25-3CSGA324C