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鍣ㄤ欢绯诲垪锛欰rtix-7
銆€銆€鍨嬭櫉锛歑C7S100-1FGGA484Q
銆€銆€灏佽褰㈠紡锛欶GGA484
銆€銆€I/O 鏁�(sh霉)閲忥細354
銆€銆€閰嶇疆闁冨瓨锛氫笉闆嗘垚
銆€銆€鐢ㄦ埗鍙敤閭忚集鍠厓锛圕LB锛夛細绱� 100K
銆€銆€鍏�(n猫i)閮ㄥ瓨鍎插櫒锛氱磩 2.1MB
銆€銆€DSP Slice 鏁�(sh霉)閲忥細256
銆€銆€鏈€澶у伐浣滈牷鐜囷細楂橀仈(d谩) 550 MHz
銆€銆€渚涢浕闆诲锛�0.9V 鏍稿績闆诲锛�1.0V 杓斿姪闆诲锛�1.8V 鎴� 3.3V I/O 闆诲
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XC7S100-1FGGA484Q 鎻愪緵浜嗗挤澶х殑鍙法绋嬮倧杓兘鍔�锛屽叾涓昏鐗规€у寘鎷細
銆€銆€1. 楂樻€ц兘锛氶噰鐢� UltraScale 鏋舵(g貌u)瑷�(sh猫)瑷堬紝鏀寔楂橀仈(d谩) 550MHz 鐨勫伐浣滈牷鐜�銆�
銆€銆€2. 浣庡姛鑰楋細浣跨敤 28nm HPL锛圚igh Performance with Low Power锛夊伐钘�锛岃兘澶犲湪淇濊瓑鎬ц兘鐨勫悓鏅傞’钁楅檷浣庡姛鑰�銆�
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