鏅傞枔锛�2023/7/19 11:21:32
闁辫畝锛�402
鐢�(ch菐n)鍝佸瀷铏� | XC6VLX130T-2FFG484C |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 240 I / O 484FBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鍒堕�犲晢 | Xilinx鍏徃 |
绯诲垪 | Virtex?-6LXT |
鎵撳寘 | 鎵樼洡 |
闆朵欢鐙�鎱�(t脿i) | 娲绘�� |
闆诲-闆绘簮 | 0.95V?1.05V |
宸ヤ綔婧害 | 0掳C?85掳C(TJ) |
鍖呰/绠� | 484-BBGA |
渚涙噳鍟嗚ō鍌欏寘瑁� | 484-FBGA(23x23) |
鍩烘湰闆朵欢铏� | XC6VLX130T |
XC6VLX130T-2FFG484C
鍒堕�犲晢鍖呰瑾槑 | 23 X 23 MM锛岀劇閴涳紝F(xi脿n)BGA-484 |
绗﹀悎REACH | 鏄� |
绗﹀悎姝愮洘RoHS | 鏄� |
鐙�鎱�(t脿i) | 娲绘�� |
鍙法绋嬮倧杓鍨� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
鏈�澶ф檪閻橀牷鐜� | 1286.0鍏嗚但 |
CLB-Max鐨勭祫鍚堝欢閬� | 4.29 ns |
JESD-30浠ｇ⒓ | S-PBGA-B484 |
JESD-609浠ｇ⒓ | e1 |
绺絉AM浣� | 9732096 |
杓稿叆鏁�(sh霉)閲� | 240.0 |
閭忚集鍠厓鏁�(sh霉) | 128000.0 |
杓稿嚭鏁�(sh霉)閲� | 240.0 |
绔瓙鏁�(sh霉) | 484 |
鏈�浣庡伐浣滄韩搴� | 0鈩� |
鏈�楂樺伐浣滄韩搴� | 85鈩� |
鍖呰涓婚珨鏉愭枡 | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰浠ｇ⒓ | BGA |
鍖呰绛夋晥浠ｇ⒓ | BGA484,22X22,40 |
鍖呰褰㈢媭 | 鍥涙柟褰� |
鍖呰褰㈠紡 | 缍�(w菐ng)鏍奸櫍鍒� |
宄板�煎洖娴佹韩搴�(鈩�) | 245 |
闆绘簮 | 1,1.2 / 2.5 |
搴ч珮 | 3.0姣背 |
瀛愰鍒� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
闆绘簮闆诲妯欑ū | 1.0浼� |
鏈�灏忎緵闆婚浕澹� | 0.95浼� |
鏈�澶ч浕婧愰浕澹� | 1.05浼� |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛� | CMOS |
婧害绛夌礆 | 鍏朵粬 |
绲傜瀹屾垚 | 閷�/閵�/閵�(Sn / Ag / Cu) |
绲傜琛ㄦ牸 | 鐞� |
绔瓙闁撹窛 | 1.0姣背 |
绲傜浣嶇疆 | 搴曢儴 |
鏅傞枔@宄板�煎洖娴佹韩搴︽渶澶у��(绉�) | 30 |
闀峰害 | 23.0姣背 |
瀵害 | 23.0姣背 |
RoHS鐙�鎱�(t脿i) | 绗﹀悎ROHS3 |
姘村垎鏁忔劅鎬ф按骞�(MSL) | 4(72灏忔檪) |
Virtex-6 LXT FPGA锛氬叿鏈夐珮绱氫覆琛岄�ｆ帴鐨勯珮鎬ц兘閭忚集
LXT鍜孲XT瑷倷鍦ㄥ悓涓�灏佽涓殑鍗犱綅闈㈢⿳鍏煎
鍏堥�茬殑楂樻�ц兘FPGA閭忚集
鐪熸鐨�6杓稿叆鏌ユ壘琛�(LUT)鎶�琛�
闆橪UT5(5杓稿叆LUT)閬搁爡
LUT /闆欒Ц鐧�(f膩)鍣ㄥ皪锛岄仼鐢ㄤ簬闇�瑕佽睈瀵屽瘎瀛樺櫒娣峰悎鐨勬噳鐢�
鏀归�茬殑甯冪窔鏁堢巼
姣忓��6杓稿叆LUT鍏锋湁64浣�(鎴栧叐鍊�32浣�)鍒嗗竷寮廘UT RAM閬搁爡
鍏锋湁娉ㄥ唺杓稿嚭閬搁爡鐨凷RL32 /闆橲RL16
寮峰ぇ鐨勬贩鍚堟ā寮忔檪閻樼鐞嗗櫒(MMCM)
MMCM妯″鎻愪緵闆跺欢閬茬珐娌栵紝闋荤巼鍚堟垚锛屾檪閻樼浉绉伙紝杓稿叆鎶栧嫊婵炬尝鍜岀浉浣嶅尮閰嶆檪閻樺垎闋�
36 Kb濉奟AM / FIFO
闆欑鍙AM濉�
鍙法绋嬬殑
闆欑鍙ｅ搴︽渶澶х偤36浣�
绨″柈鐨勯洐绔彛瀵害楂橀仈72浣�
澧炲挤鐨勫彲绶ㄧ▼FIFO閭忚集
鍏х疆鍙伕鐨勭尘閷浕璺�
(鍙伕)灏囨瘡鍊嬪鐢ㄤ綔鍏╁�嬬崹绔嬬殑18 Kb濉�
楂樻�ц兘骞惰SelectIO?鎶�琛�
1.2鑷�2.5VI / O鎿嶄綔
浣跨敤ChipSync?鎶�琛撶殑婧愬悓姝ユ帴鍙�
鏁�(sh霉)鎺ч樆鎶�(DCI)鏈夋簮绲傜
闈堟椿鐨勭窗绮掑害I / O閵�琛屾キ(y猫)鍕�
楂橀�熷収瀛樻帴鍙ｆ敮鎸�锛屽叿鏈夐泦鎴愮殑瀵潎琛″姛鑳�
鍏堥�茬殑DSP48E1鐗�
25 x 18锛屼簩閫插埗瑁滅⒓涔樻硶鍣�/绱姞鍣�
鍙伕娴佹按绶�
鏂扮殑鍙伕闋愬姞鍣ㄥ彲骞姪閬庢烤鎳夌敤绋嬪簭
鍙伕鐨勬寜浣嶉倧杓姛鑳�
灏堢敤绱氳伅(li谩n)閫ｆ帴
闈堟椿鐨勯厤缃伕闋�
SPI鍜屽苟琛孎lash鎺ュ彛
澶氭瘮鐗规祦鏀寔锛屽付鏈夊皥鐢ㄧ殑鍚庡倷閲嶆柊閰嶇疆閭忚集
鑷嫊绺界窔瀵害妾㈡脯
鎵�鏈夎ō鍌欎笂鐨勭郴绲�(t菕ng)鐩�(ji膩n)瑕栧櫒鍔熻兘
鐗囦笂/鐗囧鐔卞拰闆绘簮闆诲鐩�(ji膩n)鎺�
JTAG瑷晱鎵�鏈夌洠(ji膩n)鎺ф暩(sh霉)閲�
鐢ㄤ簬PCIExpress?瑷▓鐨勯泦鎴愭帴鍙ｅ
绗﹀悎PCI Express鍩烘湰瑕�(gu墨)鑼�2.0
GTX鏀剁櫦(f膩)鍣ㄦ敮鎸丟en1(2.5 Gb / s)鍜孏en2(5 Gb / s)
绔粸鍜屾牴绔彛鍔熻兘
姣忓�嬪x1锛寈2锛寈4鎴杧8閫氶亾鏀寔
GTX鏀剁櫦(f膩)鍣細鏈�楂�6.6 Gb / s
FPGA閭忚集涓殑閬庨噰妯ｆ敮鎸佷綆浜�480 Mb / s鐨勬暩(sh霉)鎿�(j霉)閫熺巼銆�
GTH鏀剁櫦(f膩)鍣細2.488 Gb / s鑷宠秴閬�11 Gb / s
闆嗘垚鐨�10/100/1000 Mb / s浠ュお缍�(w菐ng)MAC濉�
浣跨敤GTX鏀剁櫦(f膩)鍣ㄦ敮鎸�1000BASE-X PCS / PMA鍜孲GMII
浣跨敤SelectIO鎶�琛撹硣婧愭敮鎸丮II锛孏MII鍜孯GMII
2500Mb / s鏀寔
40 nm閵匔MOS宸ヨ棟鎶�琛�
1.0V鏍稿績闆诲(鍍呴檺-1锛�-2锛�-3閫熷害绛夌礆)
浣庡姛鑰�0.9V鍏ф牳闆诲閬搁爡(鍍呴檺-1L閫熷害绛夌礆)
楂樹俊铏熷畬鏁存�у�掕鑺墖灏佽锛屾彁渚涙婧栨垨鐒￠墰灏佽閬搁爡
XC6VLX130T-2FFG484C绗﹁櫉
XC6VLX130T-2FFG484C鑵冲嵃
