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XC6SLX4-2TQG144I 鏄� Xilinx 鍏徃 Spartan-6 绯诲垪 FPGA 鐨勪竴绋瀷铏熴�傝┎绯诲垪鍣ㄤ欢鍩轰簬鎴愮啛鐨� 45nm 宸ヨ棟鎶�琛�锛屾彁渚涢珮鎬ц兘銆佷綆鍔熻�楀拰闈堟椿鐨� I/O 鍔熻兘锛屽唬娉涙噳鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)鎺у埗銆侀啱(y墨)鐧傝ō鍌欍�佹秷璨婚浕瀛愮瓑澶氬�嬮牁鍩�銆�
銆�銆�Spartan-6 FPGA 闆嗘垚浜嗗彲绶ㄧ▼閭忚集妯″銆佸祵鍏ュ紡濉� RAM銆丏SP Slice 鍜屽绋‖鏍� IP锛堝 PCIe銆丏DR3 鎺у埗鍣ㄧ瓑锛夛紝鑳藉婊胯冻寰╅洔鐨勬暩(sh霉)瀛楄ō瑷堥渶姹�銆俋C6SLX4 鏄� Spartan-6 绯诲垪涓純灏忚(gu墨)妯＄殑涓�娆撅紝閬╁悎璩囨簮鍗犵敤杓冨皯鐨勬噳鐢ㄥ牬鏅�銆�
鍨嬭櫉锛歑C6SLX4-2TQG144I
銆�銆�绯诲垪锛歋partan-6
銆�銆�宸ヨ棟锛�45nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細4224
銆�銆�鏌ユ壘琛紙LUT锛夋暩(sh霉)閲忥細4074
銆�銆�瀵勫瓨鍣ㄦ暩(sh霉)閲忥細8148
銆�銆�Block RAM 鏁�(sh霉)閲忥細54Kb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細16
銆�銆�I/O 寮曡叧鏁�(sh霉)閲忥細100
銆�銆�閰嶇疆妯″紡锛氬緸 SPI 鎴� BPI Flash
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆�銆�灏佽锛歍QG144
XC6SLX4-2TQG144I 鎻愪緵浜嗕互涓嬩富瑕佺壒鎬э細
銆�銆�1. 鍏�(n猫i)缃� DSP Slice锛屾敮鎸侀珮鏁堢殑涔樻硶绱姞閬嬬畻锛岄仼鐢ㄤ簬鏁�(sh霉)瀛椾俊铏熻檿鐞嗘噳鐢�銆�
銆�銆�2. 鏀寔澶氱ó瀛樺劜鍣ㄦ帴鍙�锛屽寘鎷� DDR3銆丏DR2 鍜� SDRAM锛屾柟渚胯垏澶栭儴瀛樺劜鍣ㄩ�茶楂橀�熸暩(sh霉)鎿�(j霉)浜や簰銆�
銆�銆�3. 閰嶅倷璞愬瘜鐨� I/O 妯欐簴鍏煎鎬�锛屾敮鎸� LVCMOS銆丩VDS 绛夊绋浕骞虫婧栥��
銆�銆�4. 楂樺害闈堟椿鐨勬檪閻樼鐞嗘ā濉婏紙DCM/PLL锛�锛屽彲浠ョ敓鎴愮簿纰虹殑鏅傞悩淇¤櫉浠ユ豢瓒崇郴绲�(t菕ng)闇�姹�銆�
銆�銆�5. 鍏�(n猫i)缃� PCIe 纭牳妯″锛屾敮鎸佸揩閫熼�ｆ帴涓绘铏曠悊鍣ㄦ垨澶栬ō銆�
銆�銆�6. 鎻愪緵寰� Flash 鍟熷嫊鐨勮兘鍔涳紝绨″寲閰嶇疆娴佺▼骞舵彁楂樼郴绲�(t菕ng)鍙潬鎬�銆�
銆�銆�7. 瓒呬綆鍔熻�楄ō瑷堬紝闈炲父閬╁悎灏嶈兘鑰楁晱鎰熺殑鎳夌敤鐠�(hu谩n)澧�銆�
XC6SLX4-2TQG144I 甯歌鐨勬噳鐢ㄩ牁鍩熷寘鎷細
銆�銆�1. 宸ユキ(y猫)鑷嫊鍖栦腑鐨勫鏅傛帶鍒跺拰鏁�(sh霉)鎿�(j霉)閲囬泦绯荤当(t菕ng)銆�
銆�銆�2. 閱�(y墨)鐧傝ō鍌欎腑鐨勪俊铏熻檿鐞嗗拰鍦栧儚椤ず妯″銆�
銆�銆�3. 娑堣不闆诲瓙鐢�(ch菐n)鍝佷腑鐨勮闋昏檿鐞嗗拰闊虫晥澧炲挤鍔熻兘銆�
銆�銆�4. 閫氫俊闋樺煙鐨勫熀甯惰檿鐞嗗拰鍗�(xi茅)璀拌綁鎻涙ā濉�銆�
銆�銆�5. 瀹夐槻鐩�(ji膩n)鎺т腑鐨勮闋荤法纰艰В纰煎強鍌宠几鎺у埗鍠厓銆�
銆�銆�6. 鐗╄伅(li谩n)缍�(w菐ng)缍�(w菐ng)闂滀腑鐨勬暩(sh霉)鎿�(j霉)鑱氬悎鑸囧垵姝ヨ檿鐞嗛儴鍒�銆�
XC6SLX9-2TQG144C, XC6SLX16-2TQG144C
