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鎮ㄥソ锛屾杩庝締(l谩i)鍒扮董搴�(k霉)闆诲瓙甯傚牬(ch菐ng)缍�(w菐ng) 鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺(c猫)

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩�(g貌u)缍�(w菐ng) > IC鐧剧 > XC5VLX110-3FFG1760C

XC5VLX110-3FFG1760C 鐧�(f膩)甯冩檪(sh铆)闁� 鏅�(sh铆)闁擄細2025/6/3 14:54:11 鏌ョ湅 闁辫畝锛�9

XC5VLX110-3FFG1760C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-5 绯诲垪 FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄ｅ垪锛夎姱鐗�銆傝┎绯诲垪鑺墖浠ュ叾楂樻�ц兘銆侀珮瀵嗗害閭忚集璩囨簮鍜岃睈瀵岀殑澶栬ō(sh猫)鎺ュ彛鑰岃憲绋�(ch膿ng)锛屽唬娉涙噳(y墨ng)鐢ㄤ簬閫氫俊銆佷俊铏�(h脿o)铏曠悊銆佸湒鍍忚檿鐞嗙瓑闋�(l菒ng)鍩�銆�
銆�銆�Virtex-5 绯诲垪閲囩敤浜嗗厛閫�(j矛n)鐨� 65nm 鍒堕�犲伐钘�锛屾彁渚涘挤(qi谩ng)澶х殑閭忚集鍔熻兘鍜岄珮閫熶覆琛岄�ｆ帴鑳藉姏銆俋C5VLX110 鏄叾涓竴娆句腑楂樼鍨嬭櫉(h脿o)锛屽叿鏈夎純楂樼殑閭忚集鍠厓鏁�(sh霉)閲忓拰濉婂瓨鍎�(ch菙)鍣ㄥ閲�锛岄仼鐢ㄤ簬寰�(f霉)闆滅郴绲�(t菕ng)瑷�(sh猫)瑷�(j矛)銆�

鍙冩暩(sh霉)

鍨嬭櫉(h脿o)锛歑C5VLX110-3FFG1760C
銆�銆�绯诲垪锛歏irtex-5
銆�銆�鍝佺墝锛歑ilinx
銆�銆�鍒剁▼宸ヨ棟锛�65nm
銆�銆�閫熷害绛夌礆(j铆)锛�-3
銆�銆�I/O 鏁�(sh霉)閲忥細1084
銆�銆�閰嶇疆闁冨瓨锛氱劇(w煤)鍏�(n猫i)缃�
銆�銆�閭忚集鍠厓鏁�(sh霉)锛氱磩 110K
銆�銆�Block RAM 瀹归噺锛氱磩 6.2Mb
銆�銆�DSP Slice 鏁�(sh霉)閲忥細480
銆�銆�灏佽椤�(l猫i)鍨嬶細FFG1760
銆�銆�宸ヤ綔婧害鑼冨湇锛氬晢妤�(y猫)绱�(j铆) (0掳C 鑷� 85掳C)

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XC5VLX110-3FFG1760C 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘閭忚集绲�(ji茅)妲�(g貌u)锛屾敮鎸佸京(f霉)闆滅殑鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊浠诲嫏(w霉)銆�
銆�銆�2. 闆嗘垚鐨� RocketIO 鏀剁櫦(f膩)鍣ㄨ兘澶犳彁渚涢珮閬�(d谩) 6.5Gbps 鐨勪覆琛屾暩(sh霉)鎿�(j霉)鍌宠几閫熺巼銆�
銆�銆�3. 鎻愪緵澶ч噺 DSP Slice 妯″锛岄仼鍚堥珮鏁堝(sh铆)鐝�(xi脿n)涔樻硶绱姞绛夐亱(y霉n)绠椼��
銆�銆�4. 鍏�(n猫i)缃ぇ瀹归噺 Block RAM 鍜屽垎甯冨紡 RAM 璩囨簮锛屾豢(m菐n)瓒冲悇绋瓨鍎�(ch菙)闇�姹�銆�
銆�銆�5. 鏀寔澶氱ó鏅�(sh铆)閻樼鐞嗗姛鑳�锛屼緥濡� PLL 鍜� DCM锛岀敤浜庣簿纰烘帶鍒舵檪(sh铆)閻樹俊铏�(h脿o)銆�
銆�銆�6. 鎻愪緵闈堟椿鐨勭敤鎴�(h霉) I/O 鎺ュ彛锛屾敮鎸佸绋(bi膩o)婧�(zh菙n)闆诲钩鍗�(xi茅)璀�銆�
銆�銆�7. 鏀寔閮ㄥ垎閲嶉厤缃妧琛�(sh霉)锛屽厑瑷卞湪閬�(y霉n)琛屾檪(sh铆)鍕�(d貌ng)鎱�(t脿i)淇敼瑷�(sh猫)瑷�(j矛)鐨勯儴鍒嗗崁(q奴)鍩�銆�
銆�銆�8. 鍙�氶亷(gu貌) SPI銆両IC 鎴� BPI 鎺ュ彛閫�(j矛n)琛屽閮ㄩ厤缃��

鎳�(y墨ng)鐢�

XC5VLX110-3FFG1760C 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 閫氫俊瑷�(sh猫)鍌�锛屽鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙(j墨)涓殑鏁�(sh霉)鎿�(j霉)鍖呰檿鐞嗘ā濉娿��
銆�銆�2. 鍦栧儚鍜岃闋昏檿鐞嗙郴绲�(t菕ng)锛屼緥濡傚(sh铆)鏅�(sh铆)鍦栧儚澹撶府銆佽В纰煎拰婵炬尝銆�
銆�銆�3. 閱�(y墨)鐧傝ō(sh猫)鍌欎腑鐨勬暩(sh霉)鎿�(j霉)閲囬泦鑸囦俊铏�(h脿o)铏曠悊銆�
銆�銆�4. 宸ユキ(y猫)鑷嫊(d貌ng)鍖栦腑鐨勯亱(y霉n)鍕�(d貌ng)鎺у埗鍜屽(sh铆)鏅�(sh铆)鐩�(ji膩n)鎺�銆�
銆�銆�5. 楂樻�ц兘瑷�(j矛)绠楀钩鑷�(t谩i)涓殑鍗�(xi茅)铏曠悊鍣ㄦā濉娿��
銆�銆�6. 娓�(c猫)瑭﹁垏娓�(c猫)閲忚ō(sh猫)鍌欎腑鐨勪俊铏�(h脿o)鐢熸垚鑸囧垎鏋愬姛鑳�銆�
銆�銆�鍏跺挤(qi谩ng)澶х殑閭忚集璩囨簮鍜岄珮閫熸帴鍙ｄ娇鍏舵垚鐐洪渶瑕侀珮鎬ц兘瑷�(j矛)绠楀拰寰�(f霉)闆滄帶鍒舵噳(y墨ng)鐢ㄧ殑鐞嗘兂閬告搰銆�

鏇夸唬鍨嬭櫉(h脿o)

XC5VLX110T-3FFG1760C
銆�銆�XC5VLX110-2FFG1760C
銆�銆�XC5VLX110T-2FFG1760C

xc5vlx110-3ffg1760c鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�(h脿o)
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤�(ch菐ng)鍟�
  • 灏佽/鎵硅櫉(h脿o)
  • 瑭�(x煤n)鍍�(ji脿)

xc5vlx110-3ffg1760c鐢�(ch菐n)鍝�

xc5vlx110-3ffg1760c鍙冩暩(sh霉)

  • 妯�(bi膩o)婧�(zh菙n)鍖呰1
  • 椤�(l猫i)鍒�闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫�(ch菐ng)鍙法绋嬮杸(m茅n)闄ｅ垪锛�
  • 绯诲垪Virtex®-5 LX
  • LAB/CLB鏁�(sh霉)8640
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)110592
  • RAM 浣嶇附瑷�(j矛)4718592
  • 杓稿叆/杓稿嚭鏁�(sh霉)800
  • 闁�(m茅n)鏁�(sh霉)-
  • 闆绘簮闆诲0.95 V ~ 1.05 V
  • 瀹夎椤�(l猫i)鍨�琛ㄩ潰璨艰
  • 宸ヤ綔婧害0°C ~ 85°C
  • 灏佽/澶栨1760-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�1760-FCBGA
  • 閰嶇敤568-5088-ND - BOARD DEMO DAC1408D750HW-V5-ML523-UNI-G-ND - EVALUATION PLATFORM VIRTEX-5HW-AFX-FF1760-500-G-ND - BOARD DEV VIRTEX 5 FF1760