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EP4S40G5H40C1鏄疉ltera锛堢従(xi脿n)鐐篒ntel FPGA锛夋帹鍑虹殑涓�娆惧熀浜嶴tratix IV绯诲垪鐨凢PGA鑺墖銆傝┎绯诲垪浠ュ叾楂樻�ц兘鍜岄珮瀵嗗害閭忚集璩囨簮鑰岃仦鍚�锛岄仼鐢ㄤ簬閫氫俊銆佷俊铏熻檿鐞�銆佸湒鍍忚檿鐞嗕互鍙婇珮鎬ц兘瑷堢畻绛夐牁鍩�銆�
銆�銆�EP4S40G5H40C1閲囩敤鍏堥�茬殑40nm鍒堕�犲伐钘濓紝鎻愪緵璞愬瘜鐨処/O鏀寔鍜岄珮閫熶覆琛屾敹鐧�(f膩)鍣�锛岃兘澶犳豢瓒冲京闆滆ō瑷堢殑闇�姹�銆�
鍨嬭櫉锛欵P4S40G5H40C1
銆�銆�绯诲垪锛歋tratix IV
銆�銆�鍒堕�犲伐钘濓細40nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱�40,000 ALMs
銆�銆�RAM瀹归噺锛氭渶澶х磩2.6 Mb
銆�銆�DSP妯″鏁�(sh霉)閲忥細360鍊�
銆�銆�I/O寮曡叧鏁�(sh霉)閲忥細870鍊�
銆�銆�閰嶇疆鏂瑰紡锛欰S/涓诲嫊涓茶锛岃鍕曚覆琛�锛孞TAG
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹�1.0V锛岃紨鍔╅浕澹�2.5V
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
EP4S40G5H40C1鍏锋湁浠ヤ笅涓昏鐗规�э細
銆�銆�1. 楂樻�ц兘鏋舵锛氬熀浜庣‖鏍哥煡璀樼敘(ch菐n)娆婏紙IP锛夋ā濉�锛屽宓屽叆寮忓瓨鍎插櫒濉婂拰DSP濉�锛屽彲瀵︾従(xi脿n)寰╅洔鐨勬暩(sh霉)瀛搁亱绠楀拰鏁�(sh霉)鎿�(j霉)铏曠悊浠诲嫏銆�
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銆�銆�3. 澶ц(gu墨)妯￠倧杓泦鎴愶細楂橀仈40K ALM鐨勯倧杓柈鍏冿紝鑳藉瀹圭磵寰╅洔鐨勬暩(sh霉)瀛楅浕璺ō瑷�銆�
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銆�銆�5. 鍏�(n猫i)缃檪閻樼鐞嗭細鏀寔PLL鍜孌LL鍔熻兘锛屽彲鐢熸垚绮剧⒑鐨勬檪閻樹俊铏熶互鍎�(y艒u)鍖栫郴绲�(t菕ng)鎬ц兘銆�
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EP4S40G5H40C1寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊鍩虹瑷柦锛氬鐒＄窔鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙涓殑淇¤櫉铏曠悊妯″銆�
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浜庡姞閫熸湇鍕欏櫒鍏�(n猫i)鐨勬暩(sh霉)鎿�(j霉)铏曠悊鍜岀恫(w菐ng)绲″嵏杓変换鍕欍��
銆�銆�3. 鍦栧儚鑸囪闋昏檿鐞嗭細鍖呮嫭瀵︽檪瑕栭牷绶ㄧ⒓銆佽В纰煎強鍦栧儚澧炲挤銆�
銆�銆�4. 宸ユキ(y猫)鑷嫊鍖栵細瀵︾従(xi脿n)寰╅洔鐨勬帶鍒剁畻娉曞拰鍗�(xi茅)璀拌綁鎻�銆�
銆�銆�5. 閱�(y墨)鐧傝ō鍌欙細濡傝秴鑱叉尝鎴愬儚绯荤当(t菕ng)鐨勪俊铏熻檿鐞嗗柈鍏�銆�
銆�銆�6. 姹借粖闆诲瓙锛氶珮绱氶椐涜紨鍔╃郴绲�(t菕ng)锛圓DAS锛変腑鐨勬暩(sh霉)鎿�(j霉)铻嶅悎鍜岃檿鐞嗗柈鍏�銆�
EP4S40F40C2, EP4S40G5H40C2
