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EP4CE55F29C8N 鏄� Altera锛堢従(xi脿n)鐐� Intel FPGA锛夊叕鍙告帹鍑虹殑 Cyclone IV 绯诲垪 FPGA 鑺墖銆傝┎鑺墖鍩轰簬 65nm 宸ヨ棟鍒堕��锛屽叿鏈夐珮鎬ц兘銆佷綆鍔熻�楀拰楂橀泦鎴愬害鐨勭壒榛�锛岄仼鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)鎺у埗銆佹秷璨婚浕瀛愪互鍙婃苯杌婇浕瀛愮瓑闋樺煙銆�
銆�銆�閫欐 FPGA 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆佸祵鍏ュ紡瀛樺劜鍣ㄥ銆佹暩(sh霉)瀛椾俊铏熻檿鐞嗭紙DSP锛夋ā濉婁互鍙婇珮閫熸敹鐧�(f膩)鍣紝鑳藉婊胯冻澶氱ó寰╅洔瑷▓闇�姹�銆傛澶�锛屽畠閭勬敮鎸佸绋厤缃ā寮忓拰鎺ュ彛妯欐簴锛屾柟渚跨敤鎴堕�茶绯荤当(t菕ng)闆嗘垚銆�
鍨嬭櫉锛欵P4CE55F29C8N
銆�銆�绯诲垪锛欳yclone IV E
銆�銆�宸ヨ棟锛�65nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細54,890
銆�銆�宓屽叆寮忓瓨鍎插櫒锛�1,393Kb
銆�銆�DSP 妯″鏁�(sh霉)閲忥細110
銆�銆�I/O 寮曡叧鏁�(sh霉)閲忥細404
銆�銆�閰嶇疆闁冨瓨澶у皬锛氱劇鍏�(n猫i)缃杻瀛�
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
銆�銆�灏佽椤炲瀷锛欶BGA 780
EP4CE55F29C8N 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘鏋舵(g貌u)锛氶噰鐢� Stratix II 绯诲垪鐨勬灦妲�(g貌u)鏀归�茬増锛屽劒(y艒u)鍖栦簡閭忚集鍠厓涔嬮枔鐨勪簰閫ｅ欢閬插拰鍚炲悙閲�銆�
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銆�銆�3. 宓屽叆寮忓瓨鍎插櫒锛氶泦鎴愪簡 1,393Kb 鐨勫祵鍏ュ紡瀛樺劜鍣ㄥ锛屽彲鐢ㄤ簬鏁�(sh霉)鎿�(j霉)绶╂矕銆佹煡鎵捐〃绛夊姛鑳�銆�
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銆�銆�6. 澶氱ó I/O 妯欐簴鏀寔锛氬吋瀹瑰绋帴鍙ｆ婧�锛屽 PCIe銆丏DR3銆丩VCMOS 绛�锛屼究浜庣郴绲�(t菕ng)闆嗘垚銆�
銆�銆�7. 浣庡姛鑰楄ō瑷堬細閫氶亷鍏堥�茬殑闆绘簮绠＄悊鎶�琛擄紝鍦ㄤ繚璀夋�ц兘鐨勫悓鏅傞檷浣庡姛鑰�銆�
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EP4CE55F29C8N 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
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銆�銆�4. 姹借粖闆诲瓙锛氶仼鐢ㄤ簬杌婅級淇℃伅濞涙▊绯荤当(t菕ng)銆侀椐涜紨鍔╃郴绲�(t菕ng)绛�銆�
銆�銆�5. 閱�(y墨)鐧傝ō鍌欙細濡傝秴鑱叉垚鍍忋�佹偅鑰呯洠(ji膩n)璀风郴绲�(t菕ng)绛�銆�
銆�銆�6. 杌嶄簨鑸囪埅澶╋細鐢ㄤ綔宓屽叆寮忚▓绠楀钩鑷�銆佷俊铏熻檿鐞嗗柈鍏冪瓑銆�
EP4CE6E20C8N
銆�銆�EP4CE10NE24C8
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