EP1S10F672I7N 鏅�(sh铆)闁擄細2023/8/1 11:10:18 闁辫畝锛�412

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鐢�(ch菐n)鍝佸瀷铏�	EP1S10F672I7N
鎻忚堪	IC FPGA 345 I/O 672FBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)
鍒堕€犲晢	鑻辩壒鐖�
绯诲垪	Stratix?
鎵撳寘	鎵樼洡
闆朵欢鐙€鎱�(t脿i)	閬庢檪(sh铆)鐨�
闆诲-闆绘簮	1.425V?1.575V
宸ヤ綔婧害	-40掳C?100掳C(TJ)
鍖呰/绠�	672-BBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	672-FBGA(27x27)
鍩烘湰闆朵欢铏�	EP1S10

鐢�(ch菐n)鍝佸湒鐗�

EP1S10F672I7N

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍙法绋嬮倧杓鍨�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
绗﹀悎REACH	鏄�
绗﹀悎姝愮洘RoHS	鏄�
绗﹀悎涓湅RoHS	鏄�
鐙€鎱�(t脿i)	杞�(zhu菐n)鍏�
JESD-30浠ｇ⒓	S-PBGA-B672
JESD-609浠ｇ⒓	1铏�
绺絉AM浣�	920448
杓稿叆鏁�(sh霉)閲�	426.0
閭忚集鍠厓鏁�(sh霉)	10570.0
杓稿嚭鏁�(sh霉)閲�	426.0
绔瓙鏁�(sh霉)	672
宄板€煎洖娴佹韩搴�(鈩�)	260
闆绘簮	1.5,1.5 / 3.3
璩囨牸鐙€鎱�(t脿i)	涓嶅悎鏍�
瀛愰鍒�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
闆绘簮闆诲妯�(bi膩o)绋�	1.5浼�
鏈€灏忎緵闆婚浕澹�	1.425浼�
鏈€澶ч浕婧愰浕澹�	1.575浼�
瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
绲傜瀹屾垚	閷妧閵�
绲傜琛ㄦ牸	鐞�
绔瓙闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
鏅�(sh铆)闁揁宄板€煎洖娴佹韩搴︽渶澶у€�(绉�)	40
鍖呰涓婚珨鏉愭枡	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰浠ｇ⒓	BGA
鍖呰绛夋晥浠ｇ⒓	BGA672,26X26,40
鍖呰褰㈢媭	寤ｅ牬
鍖呰褰㈠紡	缍�(w菐ng)鏍奸櫍鍒�
鍒堕€犲晢鍖呰瑾槑	35 X 35 MM锛�1.27 MM闁撹窛锛岀劇閴�锛孊GA-672

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

鐒￠墰鐙€鎱�(t脿i)	鐒￠墰
姘村垎鏁忔劅鎬ф按骞�(MSL)	3(168灏忔檪(sh铆))

鐗归粸(di菐n)

10,570鑷�79,040 LE
澶氶仈(d谩)7,427,520鍊�(g猫)RAM浣�(928,440瀛楃瘈(ji茅))鍙敤锛岃€屼笉娓涘皯閭忚集璩囨簮
TriMatrixTM瀛樺劜鍣紝鐢变笁绋甊AM濉婂ぇ灏忕祫鎴�锛屼互瀵�(sh铆)鐝�(xi脿n)鐪熸鐨勯洐绔彛瀛樺劜鍣ㄥ拰鍏堥€�(j矛n)鍏堝嚭(FIFO)绶╂矕鍗€(q奴)
楂橀€烡SP妯″鎻愪緵涔樻硶鍣�(蹇簬300 MHz)锛屼箻娉曠疮鍔犲姛鑳藉拰鏈夐檺鑴堟矕闊挎噳(y墨ng)(FIR)婵炬尝鍣ㄧ殑灏堢敤瀵�(sh铆)鐝�(xi脿n)
澶氶仈(d谩)16鍊�(g猫)鍏ㄥ眬鏅�(sh铆)閻�锛屾瘡鍊�(g猫)瑷�(sh猫)鍌欏崁(q奴)鍩熷叿鏈�22鍊�(g猫)鏅�(sh铆)閻樿硣婧�
姣忓€�(g猫)瑷�(sh猫)鍌欏閬�(d谩)12鍊�(g猫)PLL(鍥涘€�(g猫)澧炲挤(qi谩ng)鍨婸LL鍜屽叓鍊�(g猫)蹇€烶LL)鍙彁渚涙摯(ku貌)闋�锛屽彲绶ㄧ▼甯跺锛屾檪(sh铆)閻樺垏鎻�锛屽(sh铆)鏅�(sh铆)PLL 閲嶉厤缃互鍙婇珮绱氫箻娉曞拰鐩哥Щ
鏀寔澶氱ó鍠鍜屽樊鍒咺 / O妯�(bi膩o)婧�(zh菙n)
鍦ㄥ閬�(d谩)116鍊�(g猫)閫氶亾涓婃敮鎸侀珮閫熷樊鍒咺 / O锛屽叾涓閬�(d谩)80鍊�(g猫)閫氶亾閲濆皪840鍏嗘瘮鐗�(Mbps)閫�(j矛n)琛屼簡鍎�(y艒u)鍖�
鏀寔楂橀€熺恫(w菐ng)绲�(lu貌)鍜岄€氫俊绺界窔妯�(bi膩o)婧�(zh菙n)锛屽寘鎷琑apidIO锛孶TOPIA IV锛孋SIX锛孒yperTransportTM 鎶€琛�(sh霉)锛�10G浠ュお缍�(w菐ng)XSBI锛孲PI-4 2鏈�(POS-PHY 4绱�)鍜孲FI-4
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鏀寔楂橀€熷閮ㄥ瓨鍎插櫒锛屽寘鎷浂绺界窔鍛ㄨ綁(zhu菐n)(ZBT)SRAM锛屽洓鏁�(sh霉)鎿�(j霉)閫熺巼(QDR鍜孮DRII)SRAM锛岄洐鏁�(sh霉)鎿�(j霉)閫熺巼(DDR)SDRAM锛孌DR蹇€熷懆鏈烺AM(FCRAM)鍜屽柈鏁�(sh霉)鎿�(j霉)閫熺巼(SDR) )SDRAM
鏀寔66-MHz鐨凱CI(64浣嶅拰32浣�)鍦�-6鍜屾洿蹇殑閫熷害绱氳缃�锛�33-MHz鐨凱CI(64浣嶅拰32浣�)鐨勬敮鎸佸湪-8鍜屾洿蹇殑閫熷害绱氬櫒浠�
鍦�-5閫熷害绛夌礆鐨勮ō(sh猫)鍌欎腑鏀寔133 MHz PCI-X 1.0
鍦�-6鍜屾洿楂橀€熷害绛夌礆鐨勮ō(sh猫)鍌欎腑鏀寔100 MHz PCI-X 1.0
鍦�-7閫熺礆瑷�(sh猫)鍌欎腑鏀寔66-MHz PCI-X 1.0
鏀寔AlteraMegaCore? 鍔熻兘鍜孉ltera Megafunction Partners Program(AMPPSM)瀹忓姛鑳戒腑鐨勫鍊�(g猫)鐭ヨ瓨鐢�(ch菐n)娆�(qu谩n)瀹忓姛鑳�
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