鏅傞枔锛�2025/5/7 14:59:05
闁辫畝锛�30
XCZU9EG-3FFVB1156E 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� UltraScale+ 绯诲垪楂樼 FPGA 鑺墖锛屽熀浜� 16nm FinFET 宸ヨ棟鍒堕��銆傝┎绯诲垪鍣ㄤ欢鏁村悎浜嗛珮鎬ц兘瑷堢畻鍜屼綆鍔熻�楄ō瑷�锛岄仼鍚堟噳鐢ㄤ簬閫氫俊銆佽埅绌鸿埅澶�銆佸湅闃�銆佸伐妤�(y猫)鑷嫊鍖栦互鍙婃暩(sh霉)鎿�(j霉)涓績绛夐牁鍩�銆�
銆�銆�XCZU9EG 灞簬 Zynq UltraScale+ MPSoC 绯诲垪锛岄泦鎴愪簡 ARM 铏曠悊鍣ㄧ郴绲�(t菕ng)鑸� FPGA 鍙法绋嬮倧杓柈鍏�锛岃兘澶犲鐝�(xi脿n)杌熺‖浠跺崝(xi茅)鍚屽劒(y艒u)鍖栫殑瑙ｆ焙鏂规銆傛鍨嬭櫉鍏锋湁璞愬瘜鐨勬帴鍙ｈ硣婧愬拰澶у閲忛倧杓柈鍏冿紝閬╃敤浜庡京闆滅郴绲�(t菕ng)闆嗘垚闇�姹�銆�
绯诲垪锛歎ltraScale+ MPSoC
銆�銆�宸ヨ棟锛�16nm FinFET
銆�銆�灏佽椤炲瀷锛欶FVB1156
銆�銆�I/O 鏁�(sh霉)閲忥細绱� 1044 鍊�
銆�銆�閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)缃厤缃杻瀛橈紙闇�澶栫疆锛�
銆�銆�鐢ㄦ埗闁冨瓨锛歂/A
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 280K
銆�銆�DSP Slice 鏁�(sh霉)閲忥細绱� 5520 鍊�
銆�銆�Block RAM 瀹归噺锛氱磩 70.8MB
銆�銆�鏅傞悩闋荤巼锛氭渶楂樺彲閬� 1GHz
銆�銆�鍔熻�楄寖鍦嶏細鏍规摎(j霉)鎳夌敤涓嶅悓锛岄潨鎱�(t脿i)鍔熻�楃磩 1W~10W
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
XCZU9EG-3FFVB1156E 鐨勪富瑕佺壒鎬у寘鎷互涓嬪咕榛烇細
銆�銆�1. 闆嗘垚闆欐牳 ARM Cortex-A53 鍜岄洐鏍� ARM Cortex-R5 铏曠悊鍣�锛屾敮鎸佸鏅傝檿鐞嗗拰閫氱敤瑷堢畻浠诲嫏銆�
銆�銆�2. 鎿佹湁澶ц(gu墨)妯″彲绶ㄧ▼閭忚集璩囨簮锛屽彲浠ラ潏娲诲鐝�(xi脿n)鍚勭ó鏁�(sh霉)瀛楅浕璺姛鑳�銆�
銆�銆�3. 鍏�(n猫i)缃� H.264/H.265 瑕栭牷绶ㄧ⒓/瑙ｇ⒓鍔犻�熷櫒锛岄仼鍚堝濯掗珨铏曠悊鍫存櫙銆�
銆�銆�4. 鎻愪緵 PCI Express Gen3銆丏DR4 瀛樺劜鎺у埗鍣ㄧ瓑楂橀�熸帴鍙�锛屾豢瓒抽珮甯跺鏁�(sh霉)鎿�(j霉)鍌宠几闇�姹�銆�
銆�銆�5. 鏀寔澶氱ó瀹夊叏鐗规��锛屽 AES 鍔犲瘑銆丼HA 鍝堝笇绠楁硶浠ュ強瀹夊叏鍟熷嫊鍔熻兘銆�
銆�銆�6. 寮峰ぇ鐨勬诞榛為亱绠楄兘鍔涳紝閫氶亷 DSP Slice 瀵︾従(xi脿n)楂樻�ц兘淇¤櫉铏曠悊銆�
銆�銆�7. 寤ｆ硾鐨勫伐浣滄韩搴﹁寖鍦嶄娇鍏惰兘澶犲湪鎯″姡鐠�(hu谩n)澧冧笅绌�(w臎n)瀹氶亱琛�銆�
XCZU9EG-3FFVB1156E 鑺墖鐨勬噳鐢ㄩ牁鍩熼潪甯稿唬娉�锛屽寘鎷絾涓嶉檺浜庯細
銆�銆�1. 閫氫俊瑷倷锛氬鐒＄窔鍩虹珯銆佽矾鐢卞櫒銆佷氦鎻涙绛夈��
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浜庣恫(w菐ng)绲″姞閫熷崱銆佹湇鍕欏櫒鍗歌級寮曟搸绛�銆�
銆�銆�3. 宸ユキ(y猫)鑷嫊鍖栵細姗熷櫒浜烘帶鍒�銆侀亱鍕曟帶鍒剁郴绲�(t菕ng)銆佸伐妤�(y猫)鐗╄伅(li谩n)缍�(w菐ng)缍�(w菐ng)闂�銆�
銆�銆�4. 閱�(y墨)鐧傝ō鍌欙細瓒呰伈娉㈡垚鍍�銆丆T 鎺冩弿鍎�銆侀仩绋嬮啱(y墨)鐧傚钩鑷�銆�
銆�銆�5. 姹借粖闆诲瓙锛氶珮绱氶椐涜紨鍔╃郴绲�(t菕ng)锛圓DAS锛夈�佽嚜鍕曢椐涢枊鐧�(f膩)骞宠嚭銆�
銆�銆�6. 鑸┖鑸ぉ鑸囧湅闃诧細闆烽仈绯荤当(t菕ng)銆佽(w猫i)鏄熼�氫俊銆佸姞瀵嗛�氫俊妯″銆�
銆�銆�7. 澶氬獟楂旇檿鐞嗭細瑕栭牷鐩�(ji膩n)鎺с�佸湒鍍忚瓨鍒�銆佸鏅傛祦濯掗珨铏曠悊銆�
XCZU9EG-2FFVB1156E
銆�銆�XCZU9EG-1FFVB1156E
銆�銆�XCZU7EV-2FFVC1156E
