日韩欧美国产极速不卡一区,国产手机视频在线观看尤物,国产亚洲欧美日韩蜜芽一区,亚洲精品国产免费,亚洲二区三区无码中文,A大片亚洲AV无码一区二区三区,日韩国语国产无码123

鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XCZU47DR-2FFVG1517I

XCZU47DR-2FFVG1517I 鐧�(f膩)甯冩檪闁� 鏅傞枔锛�2025/4/30 19:45:34 鏌ョ湅 闁辫畝锛�60

XCZU47DR-2FFVG1517I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� UltraScale+ 绯诲垪 FPGA 鑺墖锛屽熀浜庡厛閫茬殑 FinFET 宸ヨ棟鎶�琛�(sh霉)鍒堕��銆傝┎鍣ㄤ欢闆嗘垚浜嗛珮鎬ц兘鐨勯倧杓硣婧�銆丏SP 妯″銆佸瓨鍎插櫒鎺у埗鍣ㄥ拰楂橀�熸敹鐧�(f膩)鍣�锛岄仼鐢ㄤ簬楂樼瑷堢畻銆佺恫(w菐ng)绲�(lu貌)铏曠悊銆佹暩(sh霉)鎿�(j霉)涓績鍔犻�熷拰鑸┖鑸ぉ绛夋噳(y墨ng)鐢ㄩ牁(l菒ng)鍩�銆�
銆�銆�姝ゅ瀷铏熷爆浜� Zynq UltraScale+ MPSoC 绯诲垪锛屽叿鏈夊挤澶х殑鍙法绋嬮倧杓姛鑳戒互鍙婂収(n猫i)缃檿鐞嗗櫒绯荤当(t菕ng)锛岃兘澶�?q奴)宕縁(xi脿n)纭欢鍜岃粺浠剁殑鍗�(xi茅)鍚岃ō(sh猫)瑷�锛屾彁渚涢潏娲讳笖楂樻晥鐨勮В姹烘柟妗�銆�

鍙冩暩(sh霉)

灏佽锛欶FVG1517
銆�銆�閫熷害绛夌礆锛�-2
銆�銆�I/O 鏁�(sh霉)閲忥細绱� 1600
銆�銆�FPGA 閭忚集鍠厓锛氳秴閬� 470K
銆�銆�DSP Slice 鏁�(sh霉)閲忥細绱� 5800
銆�銆�鍏�(n猫i)閮� RAM锛氱磩 30MB
銆�銆�閰嶇疆闁冨瓨锛氱劇
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�宸ヨ棟绡�(ji茅)榛烇細16nm

鐗规��

XCZU47DR-2FFVG1517I 鎻愪緵浜嗚睈瀵岀殑鍔熻兘妯″鍜屾帴鍙ｆ敮鎸侊紝鍏朵富瑕佺壒鎬у寘鎷細
銆�銆�1. 闆嗘垚 ARM Cortex-A53 铏曠悊鍣ㄥ拰瀵︽檪铏曠悊鍠厓 (RPU)锛岄仼鍚堝京(f霉)闆滅殑宓屽叆寮忕郴绲�(t菕ng)瑷�(sh猫)瑷�銆�
銆�銆�2. 楂橀�熸敹鐧�(f膩)鍣ㄩ�熺巼楂橀仈 32.75Gbps锛屾豢瓒充笅涓�浠ｉ�氫俊鍗�(xi茅)璀扮殑闇�姹�銆�
銆�銆�3. 鍏�(n猫i)缃� PCIe Gen4 鎺у埗鍣紝鏀寔澶氶�氶亾閫ｆ帴浠ユ摯灞曞付瀵�銆�
銆�銆�4. 鏀寔 DDR4 鍏�(n猫i)瀛樻帴鍙ｏ紝鏁�(sh霉)鎿�(j霉)鍌宠几閫熺巼鏈�楂樺彲閬� 3200Mbps銆�
銆�銆�5. 鎻愪緵澶氱ó鍔犲瘑鍜屽畨鍏ㄥ姛鑳�锛屼繚闅滅郴绲�(t菕ng)鐨勬暩(sh霉)鎿�(j霉)瀹屾暣鎬ц垏淇濆瘑鎬�銆�
銆�銆�6. 鍙�氶亷 Vivado 鎴� SDK 宸ュ叿閫茶闁嬬櫦(f膩)锛岀啊鍖栬ō(sh猫)瑷堟祦绋嬪苟鎻愰珮鏁堢巼銆�
銆�銆�7. 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬姗熷櫒瀛�(xu茅)缈�(x铆)鎺ㄧ悊銆佸湒鍍忚檿鐞�銆佷俊铏熷垎鏋愬強楂樻�ц兘瑷堢畻绛夐牁(l菒ng)鍩熴��

鎳�(y墨ng)鐢�

瑭茶姱鐗囧唬娉涚敤浜庨渶瑕侀珮鎬ц兘鍜屼綆寤堕伈鐨勫牬鏅�锛屽吀鍨嬫噳(y墨ng)鐢ㄥ寘鎷細
銆�銆�1. 鏁�(sh霉)鎿�(j霉)涓績鏈嶅嫏(w霉)鍣ㄥ姞閫熷崱锛屾彁鍗囨暩(sh霉)鎿�(j霉)铏曠悊鑳藉姏銆�
銆�銆�2. 5G 鐒＄窔閫氫俊鍩虹珯涓殑鍩哄付铏曠悊鍠厓銆�
銆�銆�3. 鑷嫊椐曢杌婅紱涓殑鍌虫劅鍣ㄨ瀺鍚堣垏姹虹瓥鎺у埗妯″銆�
銆�銆�4. 閱�(y墨)鐧傚奖鍍忚ō(sh猫)鍌欑殑鏁�(sh霉)鎿�(j霉)閲囬泦鑸囬噸寤虹畻娉曞姞閫熴��
銆�銆�5. 宸ユキ(y猫)鑷嫊鍖栦腑鐨勫鏅傛帶鍒跺拰楂樼簿搴︽脯閲忕郴绲�(t菕ng)銆�
銆�銆�6. 鑸┖鑸ぉ闋�(l菒ng)鍩熺殑闂�(gu膩n)閸典换鍕�(w霉)铏曠悊骞宠嚭銆�

鏇夸唬鍨嬭櫉

XCZU49DR-2FFVG1517E, XCZU47DG-2FFVG1517E

xczu47dr-2ffvg1517i鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

  • 鐢�(ch菐n)鍝佸瀷铏�
  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉
  • 瑭㈠児

xczu47dr-2ffvg1517i鍙冩暩(sh霉)

  • 鐝�(xi脿n)鏈夋暩(sh霉)閲�0鐝�(xi脿n)璨ㄦ煡鐪嬩氦鏈�
  • 鍍规牸1 : 锟�236,370.23000鎵樼洡
  • 绯诲垪Zynq? UltraScale+? RFSoC
  • 鍖呰鎵樼洡
  • 鐢�(ch菐n)鍝佺媭鎱�(t脿i)鍦ㄥ敭
  • 鏋舵(g貌u)MCU锛孎(xi脿n)PGA
  • 鏍稿績铏曠悊鍣�甯� CoreSight? 鐨勫洓鏍� ARM? Cortex?-A53 MPCore?锛屽付 CoreSight? 鐨勯洐鏍� ARM?Cortex?-R5
  • 闁冨瓨澶у皬-
  • RAM 澶у皬256KB
  • 澶栬ō(sh猫)DMA锛學DT
  • 閫ｆ帴鑳藉姏CANbus锛孍BI/EMI锛屼互澶恫(w菐ng)锛孖2C锛孧MC/SD/SDIO锛孲PI锛孶ART/USART锛孶SB OTG
  • 閫熷害533MHz锛�1.333GHz
  • 涓昏灞��Zynq?UltraScale+? FPGA锛�930K+ 閭忚集鍠厓
  • 宸ヤ綔婧害-40掳C ~ 100掳C锛圱J锛�
  • 灏佽/澶栨1517-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗗櫒浠跺皝瑁�1517-FCBGA锛�40x40锛�