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闁辫畝锛�34
XCZU19EG-1FFVD1760E 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� UltraScale+ 绯诲垪楂樼 FPGA 鑺墖锛屽熀浜庤嚭绌嶉浕锛圱SMC锛�16nm FinFET Plus 宸ヨ棟鎶�琛�(sh霉)鍒堕�犮�傝┎鍣ㄤ欢灞簬 Zynq UltraScale+ MPSoC 绯诲垪锛岄泦鎴愪簡鍙法绋嬮倧杓�銆丄RM 铏曠悊鍣ㄧ郴绲�(t菕ng)鍜岄珮鎬ц兘 DSP 妯″锛岄仼鐢ㄤ簬闇�瑕侀珮瑷堢畻鎬ц兘鍜岄潏娲荤‖浠跺姞閫熺殑鎳夌敤鍫存櫙銆�
銆�銆�XCZU19EG 鐗瑰垾閬╁悎鐢ㄤ簬宓屽叆寮忚瑕恒�侀珮绱氶椐涘摗杓斿姪绯荤当(t菕ng)锛圓DAS锛�銆佸伐妤�(y猫)鑷嫊鍖栨帶鍒�銆佽埅绌鸿埅澶╄垏鍦嬮槻浠ュ強楂樻�ц兘瑷堢畻绛夐牁(l菒ng)鍩�銆�
灏佽锛欶FVD1760
銆�銆�I/O 鏁�(sh霉)閲忥細4245
銆�銆�閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)閮ㄩ杻瀛橈紝闇�澶栨帴
銆�銆�鏈�澶ф煡鎵捐〃锛圠UTs锛夛細绱� 1,038,960
銆�銆�灏堢敤 DSP 妯″鏁�(sh霉)閲忥細5520
銆�銆�鐗囦笂瀛樺劜鍣紙Block RAM锛夛細绱� 68MB
銆�銆�楂橀�熸敹鐧�(f膩)鍣ㄩ�熺巼锛氭渶楂� 32.75Gbps
銆�銆�铏曠悊鍣ㄦ灦妲�(g貌u)锛氶洐鏍� ARM Cortex-A53 + 闆欐牳 ARM Cortex-R5
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹� 0.85V锛孖/O 闆诲鏍规摎(j霉)閰嶇疆涓嶅悓鍙偤 1.8V/2.5V/3.3V
XCZU19EG 鎻愪緵浜嗗崜瓒婄殑瑷堢畻鑳藉姏鍜岄潏娲绘�э細
銆�銆�1. 楂樺害闆嗘垚鐨勭暟妲�(g貌u)铏曠悊绯荤当(t菕ng)锛屽寘鍚洐鏍� ARM Cortex-A53 鎳夌敤铏曠悊鍣ㄥ拰闆欐牳 ARM Cortex-R5 瀵︽檪铏曠悊鍣�锛屾敮鎸� Linux 鍜屽鏅傛搷浣滅郴绲�(t菕ng)銆�
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銆�銆�3. 鏀寔澶氶仈 5520 鍊嬪皥鐢� DSP Slice锛岄仼鐢ㄤ簬寰╅洔鐨勬暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�4. 鎻愪緵楂橀仈 32.75Gbps 鐨勯珮閫熶覆琛屾敹鐧�(f膩)鍣�锛岄仼鍚堟暩(sh霉)鎿�(j霉)涓績浜掕伅(li谩n)鍜岄珮閫熼�氫俊鎳夌敤銆�
銆�銆�5. 鏀寔澶氱ó鎺ュ彛鍗�(xi茅)璀�锛屽 PCIe Gen4銆丆CIX銆乁SB 3.0銆丼ATA銆佷互澶恫(w菐ng)绛�銆�
銆�銆�6. 寮峰ぇ鐨勫畨鍏ㄥ姛鑳�锛屽寘鎷� AES 鍔犲瘑寮曟搸銆丼HA 鍔犻�熷櫒鍜屼俊浠绘牴淇濊姗熷埗锛岀⒑淇濇暩(sh霉)鎿�(j霉)鍌宠几鍜岃ō(sh猫)鍌欑殑瀹夊叏鎬�銆�
銆�銆�7. 浣庡姛鑰楄ō(sh猫)瑷堢祼(ji茅)鍚堝嫊鎱�(t脿i)闆绘簮绠＄悊鎶�琛�(sh霉)锛岄�蹭竴姝ュ劒(y艒u)鍖栫郴绲�(t菕ng)鑳借�楄〃鐝�(xi脿n)銆�
瑭茶姱鐗囧唬娉涙噳鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 宓屽叆寮忚瑕虹郴绲�(t菕ng)锛屼緥濡傛鍣ㄥ缈掓帹鐞�銆佸湒鍍忚檿鐞嗗拰鐩妾㈡脯銆�
銆�銆�2. 楂樼礆椐曢鍝¤紨鍔╃郴绲�(t菕ng)锛圓DAS锛�锛屽鑷仼鎳夊贰鑸帶鍒跺拰杌婇亾淇濇寔杓斿姪銆�
銆�銆�3. 宸ュ拰寰╅洔閬嬪嫊鎺у埗銆�
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銆�銆�5. 鑸┖鑸ぉ鑸囧湅闃查牁(l菒ng)鍩熶腑鐨勯浄閬斾俊铏熻檿鐞嗗拰琛�(w猫i)鏄熼�氫俊绯荤当(t菕ng)銆�
銆�銆�6. 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌�锛屽瓒呰伈娉㈠拰CT鎺冩弿鍎�鐨勬暩(sh霉)鎿�(j霉)铏曠悊鍠厓銆�
銆�銆�7. 楂樻�ц兘瑷堢畻骞宠嚭锛屾彁渚涘ぇ瑕�(gu墨)妯″苟琛岃▓绠楄兘鍔涖��
XCZU28DR-2FPGA2104E
銆�銆�XCZU17EG-2FFVC1760E
銆�銆�XCZU15EG-1FFVC1760E
