鑺�鐗囬�炲瀷锛欶PGA
銆�銆�宸ヨ棟鍒剁▼锛�16nm
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細绱� 250 钀�(w脿n)鍊�(g猫)
銆�銆�DSP Slice 鏁�(sh霉)閲忥細7800 鍊�(g猫)
銆�銆�Block RAM 瀹归噺锛氱磩 39.7MB
銆�銆�閰嶇疆 Flash锛氱劇(w煤)鍏�(n猫i)缃�
銆�銆�I/O 鏁�(sh霉)閲忥細鏈�澶� 1224 鍊�(g猫)
銆�銆�渚涢浕闆诲�擄細鏍稿績闆诲�� 0.85V
銆�銆�灏佽�濋�炲瀷锛歀VB2104
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C
銆�銆�鍔熻�楀吀鍨嬪�硷細绱� 10W锛堝彇姹轰簬浣跨敤鍫�(ch菐ng)鏅�锛�

XCVU5P-3FLVB2104E 鎻愪緵鍗撹秺鐨勬�ц兘鑸囬潏娲绘��锛屽叾涓昏�佺壒鎬у寘鎷�锛�
銆�銆�1. 闆嗘垚澶ч噺鍙�绶ㄧ▼閭忚集鍠�鍏�锛岄仼鐢ㄤ簬寰�(f霉)闆滆▓(j矛)绠椾换鍕�(w霉)锛�
銆�銆�2. 鍏�(n猫i)宓岄珮鏁堢殑 DSP 妯″��锛岃兘澶犳豢瓒抽珮绮惧害鏁�(sh霉)瀛椾俊铏�(h脿o)铏曠悊闇�姹�锛�
銆�銆�3. 鏀�鎸佸�氶�熺巼鐨勯珮閫熶覆琛屾敹鐧�(f膩)鍣�锛屽偝杓搁�熷害鏈�楂樺彲閬�(d谩) 32.75Gbps锛�
銆�銆�4. 寮�(qi谩ng)澶х殑鏅�(sh铆)閻樼�＄悊宸ュ�� (Clock Management Tile)锛岀⒑淇濈簿纰虹殑鏅�(sh铆)閻樺垎鐧�(f膩)鍜岀浉浣嶈��(di脿o)鏁�锛�
銆�銆�5. 澶氱ó瀛樺劜(ch菙)鎺ュ彛鏀�鎸�锛屼緥濡� DDR4銆丩PDDR4 鍜� HBM锛�
銆�銆�6. 鎻愪緵澶氱ó闆绘簮绠＄悊妯″紡浠ュ劒(y艒u)鍖栬兘鏁�锛�
銆�銆�7. 寤ｆ硾鍏煎�瑰悇绋�澶栭儴鍗�(xi茅)璀帮紝濡� PCIe Gen4銆丆CIX 鍜� CXL銆�

閫欐�� FPGA 鑺�鐗囬仼鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 鏁�(sh霉)鎿�(j霉)涓�蹇冿細鐢ㄤ簬璨�(f霉)杓夊潎琛�銆佺恫(w菐ng)绲�(lu貌)鍔犻�熷拰娣卞害瀛�(xu茅)缈�(x铆)鎺ㄧ悊绛変换鍕�(w霉)锛�
銆�銆�2. 閫氫俊绯荤当(t菕ng)锛氭敮鎸� 5G 鐒�(w煤)绶氬熀绀�(ch菙)瑷�(sh猫)鏂戒腑鐨勫熀甯惰檿鐞嗗拰鍓嶅偝/鍥炲偝缍�(w菐ng)绲�(lu貌)鍔熻兘锛�
銆�銆�3. 鍦栧儚铏曠悊锛氬湪瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佸湒鍍忓�炲��(qi谩ng)鍙婂��(sh铆)鏅�(sh铆)鍒嗘瀽涓�鐧�(f膩)鎻�闂�(gu膩n)閸典綔鐢�锛�
銆�銆�4. 宸ユキ(y猫)鎺у埗锛氬��(sh铆)鐝�(xi脿n)閬�(y霉n)鍕�(d貌ng)鎺у埗銆佹��(j墨)鍣ㄤ汉瑕栬�哄強鍏朵粬寰�(f霉)闆滅殑宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栨噳(y墨ng)鐢�锛�
銆�銆�5. 鑸�绌鸿埅澶╄垏鍦�(gu贸)闃诧細鐢ㄤ綔淇¤櫉(h脿o)铏曠悊鍠�鍏冩垨宓屽叆寮忔帶鍒剁郴绲�(t菕ng)鐨勬牳蹇冪祫浠�锛�
銆�銆�6. 閱�(y墨)鐧傝ō(sh猫)鍌欙細鎻愪緵楂樼簿搴︽暩(sh霉)鎿�(j霉)閲囬泦鍜屽��(sh铆)鏅�(sh铆)鍦栧儚閲嶅缓鑳藉姏銆�

XCVU5P-2FLGA2104E
銆�銆�XCVU5P-3EHBG757I
銆�銆�XCVU5P-3FHGB2104E