鏅傞枔锛�2025/5/10 14:58:29
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XCVU27P-2FIGD2104E鏄疿ilinx鍏徃鎺ㄥ嚭鐨刄ltraScale+绯诲垪鐨凢PGA鑺墖銆傝┎绯诲垪鍣ㄤ欢閲囩敤鍏堥�茬殑FinFET宸ヨ棟鎶�琛�锛屾彁渚涗簡鍗撹秺鐨勬�ц兘銆佸付瀵拰闆嗘垚搴︺�俋CVU27P涓昏闈㈠悜楂樼鎳夌敤闋樺煙锛屼緥濡傛暩(sh霉)鎿�(j霉)涓績鍔犻�熴�佺恫(w菐ng)绲¤檿鐞�銆佽闋昏檿鐞�銆佸伐妤�(y猫)鑷嫊鍖栦互鍙婅埅绌鸿埅澶╃瓑锛屽叿鏈夐珮瀵嗗害閭忚集鍠厓銆佽睈瀵岀殑DSP Slice銆佸ぇ瀹归噺宓屽叆寮忓瓨鍎插櫒銆侀珮閫熶覆琛屾敹鐧�(f膩)鍣ㄥ拰闈堟椿鐨処/O鏀寔銆�
銆�銆�瑭插瀷铏熶腑鐨勫叿楂斿弮鏁�(sh霉)瀹氱京濡備笅锛歑CVU琛ㄧずVirtex UltraScale+ FPGA绯诲垪锛�27P浠ｈ〃鍏烽珨鐨勭鐗囪畩楂斿強鍔熻兘闆嗭紝2琛ㄧず閫熷害绛夌礆锛孎(xi脿n)IGD2104琛ㄧず灏佽椤炲瀷鐐�2104寮曡叧鐨凢FG灏佽銆�
閭忚集鍠厓鏁�(sh霉)閲忥細绱�280钀�
銆�銆�DSP Slice鏁�(sh霉)閲忥細5820
銆�銆�Block RAM瀹归噺锛氱磩34.6MB
銆�銆�URAM瀹归噺锛氱磩9.8MB
銆�銆�楂橀�熸敹鐧�(f膩)鍣ㄦ暩(sh霉)閲忥細80
銆�銆�鏈�澶ф敹鐧�(f膩)鍣ㄩ�熺巼锛�32.75Gbps
銆�銆�I/O寮曡叧鏁�(sh霉)閲忥細2104
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C鑷�+100掳C
銆�銆�渚涢浕闆诲锛氬鏍镐緵闆伙紙涓嶅悓鍏�(n猫i)鏍稿拰妯″闇�瑕佷笉鍚岄浕澹擄級
1. 鏀寔楂橀仈32.75Gbps鐨勯珮閫熸敹鐧�(f膩)鍣�锛岄仼鍚堥珮鎬ц兘缍�(w菐ng)绲″拰鑳屾澘閫氫俊鎳夌敤銆�
銆�銆�2. 闆嗘垚澶ч噺瀛樺劜璩囨簮锛屽寘鎷珺lock RAM鍜孶ltraRAM锛屾豢瓒冲京闆滅畻娉曞拰鏁�(sh霉)鎿�(j霉)绶╂矕鐨勯渶姹傘��
銆�銆�3. DSP Slice鍏峰倷楂樻�ц兘娴粸閬嬬畻鑳藉姏锛岄仼鐢ㄤ簬淇¤櫉铏曠悊銆佺煩闄ｉ亱绠楃瓑闋樺煙銆�
銆�銆�4. 鍏�(n猫i)缃‖鏍歌檿鐞嗗櫒濡侫RM Cortex-A53锛屾敮鎸佸鏅傛搷浣滅郴绲�(t菕ng)鍜岄珮绱氭帶鍒跺姛鑳�銆�
銆�銆�5. 鏀寔澶氱ó鎺ュ彛鍗�(xi茅)璀帮紝渚嬪PCIe Gen4銆丆CIX銆丆PRI绛�锛岄仼鎳夊唬娉涚殑鎳夌敤鍫存櫙銆�
銆�銆�6. 楂樺彲闈犳�цō瑷�锛岀鍚堝伐妤�(y猫)鍜岃粛宸ョ礆瑕佹眰銆�
1. 鏁�(sh霉)鎿�(j霉)涓績鍔犻�熷崱锛岀敤浜嶢I鎺ㄧ悊銆佹暩(sh霉)鎿�(j霉)搴煡瑭㈠姞閫熺瓑鍔熻兘銆�
銆�銆�2. 楂橀�熺恫(w菐ng)绲¤ō鍌�锛屽璺敱鍣ㄣ�佷氦鎻涙鍜岀恫(w菐ng)鍗�銆�
銆�銆�3. 瑕栭牷寤ｆ挱绯荤当(t菕ng)锛屾敮鎸�4K/8K瑕栭牷绶ㄨВ纰艰垏铏曠悊銆�
銆�銆�4. 宸ユキ(y猫)鎺у埗鑸囪嚜鍕曞寲锛屽鐝�(xi脿n)寰╅洔鐨勫鏅傛帶鍒剁畻娉�銆�
銆�銆�5. 鑸┖鑸ぉ闋樺煙锛屾彁渚涢珮鍙潬鎬у拰鎶楄蓟灏勮兘鍔�銆�
銆�銆�6. 閱�(y墨)鐧傚奖鍍忚ō鍌欙紝铏曠悊娴烽噺鍦栧儚鏁�(sh霉)鎿�(j霉)骞堕�茶蹇�熻ê鏂�銆�
XCVU37P-2FIGD2104E, XCVU27P-2FLGA2104E
