鑺�鐗囩郴鍒楋細UltraScale+
銆�銆�鍒剁▼宸ヨ棟锛�16nm FinFET+
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細绱� 1,980,000
銆�銆�DSP Slice 鏁�(sh霉)閲忥細7,800
銆�銆�Block RAM 瀹归噺锛氱磩 52MB
銆�銆�鍏�(n猫i)閮� Flash 瀛樺劜锛氱劇锛堥渶澶栫疆閰嶇疆鑺�鐗囷��
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�2,104
銆�銆�渚涢浕闆诲�擄細鏍稿績闆诲�� 0.85V锛岃紨鍔╅浕澹� 1.0V
銆�銆�鏈�澶у姛鑰楋細绱� 40W锛堣�栨��(y墨ng)鐢ㄨ�屽畾锛�
銆�銆�灏佽�濋�炲瀷锛欶GHGB锛團ine-Pitch Grid High Density Ball Grid Array锛�
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +100掳C
銆�銆�閫熷害绛夌礆锛�1 (鏈�蹇�)

XCVU13P-1FHGB2104I 鐨勪富瑕佺壒鎬у寘鎷�锛�
銆�銆�1. 楂樻�ц兘鏋舵��(g貌u)锛氬熀浜� UltraScale+ 鏋舵��(g貌u)瑷�(sh猫)瑷�锛屾敮鎸佸京(f霉)闆滅殑鏅傚簭璺�寰戝拰楂樻晥鐨勮硣婧愬埄鐢ㄧ��銆�
銆�銆�2. 澶ц��(gu墨)妯￠倧杓�闆嗘垚锛氬寘鍚�杩� 2 鐧捐惉鍊嬮倧杓�鍠�鍏�锛岃兘澶�?q奴)宕縁(xi脿n)闈炲父寰�(f霉)闆滅殑鏁�(sh霉)瀛楅浕璺�瑷�(sh猫)瑷�銆�
銆�銆�3. 鍏�(n猫i)缃�纭�浠跺姞閫熸ā濉婏細閰嶅倷灏堢敤鐨� DSP Slice 鍜� Block RAM锛岄潪甯搁仼鍚堢敤浜庝俊铏熻檿鐞嗗拰娣卞害瀛�(xu茅)缈�(x铆)浠诲嫏(w霉)銆�
銆�銆�4. 璞愬瘜鐨� I/O 鏀�鎸侊細鏀�鎸佸�氱ó楂橀�熶覆琛屾帴鍙ｆ��(bi膩o)婧�(zh菙n)锛堝�� PCIe Gen4銆丏DR4銆�100GbE锛夛紝婊胯冻鐝�(xi脿n)浠ｇ郴绲�(t菕ng)灏嶅付瀵�鐨勯渶姹�銆�
銆�銆�5. 鍙�鎿村睍鎬у挤锛氶�氶亷纭�鏍歌檿鐞嗗櫒瀛愮郴绲�(t菕ng)鎴栬粺鏍稿祵鍏ュ紡铏曠悊鍣ㄦ敮鎸侀潏娲荤殑绯荤当(t菕ng)绱氳ō(sh猫)瑷堛��
銆�銆�6. 鍔熻�楀劒(y艒u)鍖栵細鍏峰倷鍕曟厠(t脿i)鍔熻�楃�＄悊鍔熻��锛屽彲浠ユ牴鎿�(j霉)瀵﹂殯璨犺級瑾�(di脿o)鏁磋姱鐗囬亱琛岀媭鎱�(t脿i)浠ラ檷浣庡姛鑰椼��
銆�銆�7. 瀹夊叏姗熷埗锛氭彁渚涘姞瀵嗘瘮鐗规祦鍔犺級鍔熻兘锛岀⒑淇� IP 淇濊�峰強鏁�(sh霉)鎿�(j霉)瀹夊叏銆�

XCVU13P-1FHGB2104I 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 鏁�(sh霉)鎿�(j霉)涓�蹇冿細浣滅偤鏈嶅��(w霉)鍣ㄥ姞閫熷崱鐨勬牳蹇冨櫒浠讹紝鍩�(zh铆)琛屾�熷櫒瀛�(xu茅)缈�(x铆)鎺ㄧ悊銆佹暩(sh霉)鎿�(j霉)鍒嗘瀽绛夊姛鑳姐��
銆�銆�2. 缍�(w菐ng)绲�(lu貌)閫氫俊锛氬湪 5G 鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙�熶腑鎻愪緵淇¤櫉铏曠悊鑸囧��(xi茅)璀拌綁(zhu菐n)鎻涜兘鍔涖��
銆�銆�3. 宸ユキ(y猫)鑷�鍕曞寲锛氬�︾従(xi脿n)寰�(f霉)闆滅殑瀵︽檪鎺у埗绠楁硶鍜岄珮绮惧害鍌虫劅鍣ㄦ暩(sh霉)鎿�(j霉)閲囬泦銆�
銆�銆�4. 閱�(y墨)鐧傛垚鍍忥細鏀�鎸佸揩閫熷湒鍍忛噸寤哄拰澧炲挤铏曠悊銆�
銆�銆�5. 瑕栭牷铏曠悊锛氶仼鐢ㄤ簬瑕栭牷杞�(zhu菐n)纰�銆佽▓绠楁�熻�栬�哄垎鏋愮瓑鍫存��銆�
銆�銆�6. 宓屽叆寮忕郴绲�(t菕ng)闁嬬櫦(f膩)锛氱祼(ji茅)鍚� ARM Cortex-A53 鎴栧叾浠栬檿鐞嗗櫒锛屾��(g貌u)寤哄畬鏁寸殑 SoC 瑙ｆ焙鏂规�堛��

XCVU9P-1FHGB2104I, XCVU11P-1FHGB2104I