XCVU125-3FLVD1517E 鏅傞枔锛�2025/4/29 8:43:30 闁辫畝锛�39

XCVU125-3FLVD1517E 鏄敱 Xilinx锛堢従(xi脿n)宸茶 AMD 鏀惰臣锛夌敓鐢�(ch菐n)鐨勪竴娆鹃珮绔� FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪锛夎姱鐗�锛屽爆浜� Virtex UltraScale+ 绯诲垪銆傝┎绯诲垪鍣ㄤ欢閲囩敤鑷虹⿳闆� 16nm FinFET+ 宸ヨ棟鍒堕€�锛屽叿鏈夐珮閭忚集瀵嗗害銆侀珮鎬ц兘鍜屼綆鍔熻€楃殑鐗归粸銆傞€欐 FPGA 涓昏闈㈠悜閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂�銆佹暩(sh霉)鎿�(j霉)涓績鍔犻€�銆佽埅绌鸿埅澶╄垏鍦嬮槻绛夐珮鎬ц兘鎳�(y墨ng)鐢ㄩ牁(l菒ng)鍩�銆�
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鍙冩暩(sh霉)

鍨嬭櫉锛歑CVU125-3FLVD1517E
銆€銆€绯诲垪锛歏irtex UltraScale+
銆€銆€宸ヨ棟锛�16nm FinFET+
銆€銆€閭忚集鍠厓鏁�(sh霉)锛氱磩 125 钀€�
銆€銆€閰嶇疆瀛樺劜椤炲瀷锛欶lash
銆€銆€鍏�(n猫i)鏍搁浕澹擄細1.0V
銆€銆€I/O 闆诲锛�1.8.3V
銆€銆€鏀剁櫦(f膩)鍣ㄩ€熺巼锛氭渶楂� 32.75Gbps
銆€銆€灏佽褰㈠紡锛欶FG1517
銆€銆€婧害鑼冨湇锛氬伐妤�(y猫)绱氾紙-40掳C 鑷� +100掳C锛�

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XCVU125-3FLVD1517E 鍏峰倷浠ヤ笅椤憲鐗规€э細
銆€銆€1. 楂樻€ц兘鏋舵(g貌u)锛氬熀浜� UltraScale+ 鏋舵(g貌u)瑷�(sh猫)瑷�锛屾彁渚涙洿楂樼殑鍚炲悙閲忓拰鏇翠綆鐨勫欢閬诧紝閬╃敤浜庤▓绠楀瘑闆嗗瀷浠诲嫏(w霉)銆�
銆€銆€2. 鍏�(n猫i)缃珮閫熶覆琛屾敹鐧�(f膩)鍣細鏀寔楂橀仈 32.75Gbps 鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼锛屾豢瓒崇従(xi脿n)浠ｉ€氫俊绯荤当(t菕ng)灏嶅付瀵殑闇€姹�銆�
銆€銆€3. 澶у閲忓瓨鍎茶硣婧愶細鍖呭惈 Block RAM 鍜屽垎甯冨紡 RAM锛岄仼鍚堝鐝�(xi脿n)寰�(f霉)闆滅殑绠楁硶鍜屾暩(sh霉)鎿�(j霉)绶╂矕鍔熻兘銆�
銆€銆€4. DSP Slice锛氬収(n猫i)缃ぇ閲忔暩(sh霉)瀛椾俊铏熻檿鐞嗗柈鍏�锛屽劒(y艒u)鍖栦簡娴粸閬嬬畻鍜屾烤娉㈠櫒瀵︾従(xi脿n)銆�
銆€銆€5. 纭牳铏曠悊鍣ㄦā濉婏細鏀寔 PCIe Gen4 绛夋(bi膩o)婧栵紝绨″寲浜嗙郴绲�(t菕ng)闆嗘垚閬庣▼銆�
銆€銆€6. 鍔熻€楀劒(y艒u)鍖栨妧琛�(sh霉)锛氶€氶亷鍕曟厠(t脿i)鍔熻€楄(di脿o)绡€(ji茅)鍜屾檪閻橀杸鎺х瓑鎵嬫闄嶄綆鏁撮珨鑳借€�銆�

鎳�(y墨ng)鐢�

XCVU125-3FLVD1517E 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆€銆€1. 鏁�(sh霉)鎿�(j霉)涓績鍔犻€燂細鐢ㄤ簬姗熷櫒瀛�(xu茅)缈�(x铆)鎺ㄧ悊銆佽闋昏綁(zhu菐n)纰煎拰鍏朵粬楂樻€ц兘瑷堢畻鍫存櫙銆�
銆€銆€2. 閫氫俊瑷�(sh猫)鍌欙細鍖呮嫭 5G 鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙涓殑鏍稿績淇¤櫉铏曠悊閮ㄥ垎銆�
銆€銆€3. 宸ユキ(y猫)鑷嫊鍖栵細瀵︾従(xi脿n)瀵︽檪鎺у埗鍜岄珮绮惧害鏁�(sh霉)鎿�(j霉)閲囬泦銆�
銆€銆€4. 閱�(y墨)鐧傛垚鍍忥細鏀寔鍦栧儚閲嶅缓鍜岃檿鐞嗕换鍕�(w霉)銆�
銆€銆€5. 鑸┖鑸ぉ鑸囧湅闃诧細鎻愪緵鍙潬鐨勮▓绠楄兘鍔涗互鎳�(y墨ng)灏嶆サ绔挵(hu谩n)澧冧笅鐨勬寫鎴�(zh脿n)銆�