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XCVU11P-3FLGF1924E 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� UltraScale+ 绯诲垪楂樼 FPGA 鑺墖銆傝┎绯诲垪鑺墖鍩轰簬鑷虹⿳闆伙紙TSMC锛�16nm FinFET+ 鍒剁▼宸ヨ棟鍒堕��锛屽叿鏈夐珮搴﹂泦鎴愮殑鍙法绋嬮倧杓柈鍏�銆佽睈瀵岀殑 DSP 妯″浠ュ強澶у閲忕殑宓屽叆寮忓瓨鍎插櫒璩囨簮銆傞�欐鍣ㄤ欢閬╃敤浜庨珮鎬ц兘瑷堢畻銆佹暩(sh霉)鎿�(j霉)涓績鍔犻��銆佺恫(w菐ng)绲￠�氫俊銆佽闋昏檿鐞嗗拰鍦栧儚鍒嗘瀽绛夊京闆滄噳鐢ㄥ牬鏅�銆�
銆�銆�UltraScale+ 绯诲垪閫氶亷寮曞叆鏂扮殑鏋舵鐗规��锛屼緥濡傚寮峰瀷鐗囦笂缍�(w菐ng)绲★紙NoC锛�銆侀珮閫熸敹鐧�(f膩)鍣ㄥ拰楂樼礆瀛樺劜鍣ㄦ帴鍙�锛岃兘澶犻’钁楁彁楂樼郴绲�(t菕ng)鎬ц兘鍜岃兘鏁堟瘮銆�
鍨嬭櫉锛歑CVU11P-3FLGF1924E
銆�銆�灏佽椤炲瀷锛欶LGF1924
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 570K
銆�銆�DSP Slice 鏁�(sh霉)閲忥細6800
銆�銆�鍏ч儴 BRAM 瀹归噺锛氱磩 68MB
銆�銆�鍏ч儴 ULTRARAM 瀹归噺锛氱磩 24MB
銆�銆�鏀剁櫦(f膩)鍣ㄩ�熺巼锛氭渶楂橀仈 32.75Gbps
銆�銆�I/O 鏁�(sh霉)閲忥細鏈�澶氭敮鎸� 1032 鍊嬬敤鎴� I/O
銆�銆�閰嶇疆妯″紡锛氭敮鎸佸柈姣旂壒娴佸拰澶氭瘮鐗规祦妯″紡
銆�銆�宸ヤ綔婧害鑼冨湇锛氬伐妤�(y猫)绱氾紙-40掳C 鑷� +100掳C锛�
XCVU11P-3FLGF1924E 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘鏋舵锛氶噰鐢� UltraScale+ FPGA 鏋舵瑷▓锛屾彁渚涙洿楂樼殑閭忚集瀵嗗害鍜屾洿鍎�(y艒u)鐨勬檪搴忔�ц兘銆�
銆�銆�2. 澧炲挤鍨嬫敹鐧�(f膩)鍣細鏀寔楂橀仈 32.75Gbps 鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼锛屽苟鍏煎澶氱ó琛屾キ(y猫)妯欐簴鍗�(xi茅)璀帮紙濡� PCIe Gen4銆丆PRI銆丣ESD204B/C锛�銆�
銆�銆�3. 寮峰ぇ鐨勬暩(sh霉)瀛椾俊铏熻檿鐞嗚兘鍔涳細闆嗘垚浜嗗ぇ閲� DSP48E2 妯″锛屽彲婊胯冻寰╅洔鐨勬诞榛為亱绠楅渶姹傘��
銆�銆�4. 鐗囦笂瀛樺劜鍣ㄦ摯灞曪細鍏х疆澶у閲� Block RAM 鍜� UltraRAM锛屾敮鎸侀珮鏁堢殑鏁�(sh霉)鎿�(j霉)绶╁瓨鑸囩鐞�銆�
銆�銆�5. 鍏х疆瀹夊叏鎬у姛鑳斤細鎻愪緵 AES-256 鍔犲瘑銆丼HA-356 鏁ｅ垪绠楁硶浠ュ強 Bitstream Authentication 鍔熻兘浠ョ⒑淇濊ō瑷堢殑瀹夊叏鎬с��
銆�銆�6. 鏀寔闈堟椿鐨勫姛鑰楀劒(y艒u)鍖栵細鍙�氶亷 Power Scaling 鎶�琛撳嫊鎱�(t脿i)瑾挎暣鏍稿績闆诲鍜岄牷鐜�锛屽緸鑰岄檷浣庢暣楂斿姛鑰�銆�
銆�銆�7. 鍙潬鎬т繚闅滐細鍏峰倷 ECC 鏍￠姗熷埗渚嗕繚璀烽棞閸垫暩(sh霉)鎿�(j霉)鍏嶅彈杌熼尟瑾ゅ奖闊�銆�
XCVU11P-3FLGF1924E 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浜庢湇鍕欏櫒璨犺級鍧囪 銆佽櫅鎿寲鍔犻�熷強浜哄伐鏅鸿兘鎺ㄧ悊浠诲嫏銆�
銆�銆�2. 缍�(w菐ng)绲￠�氫俊锛氭敮鎸� 5G 鍩虹珯銆佹牳蹇冪恫(w菐ng)闂滆ō鍌欎腑鐨勬暩(sh霉)鎿�(j霉)鍖呰檿鐞嗚垏杞夌櫦(f膩)銆�
銆�銆�3. 瑕栭牷铏曠悊锛氶仼鍚堝鏅傝闋荤法纰艰В纰笺�佸湒鍍忓寮风瓑澶氬獟楂旀噳鐢�銆�
銆�銆�4. 閱�(y墨)鐧傛垚鍍忥細瀵︾従(xi脿n)楂樼簿搴﹂啱(y墨)鐧傚奖鍍忛噸寤哄拰瑷烘柗杓斿姪銆�
銆�銆�5. 宸ユキ(y猫)鑷嫊鍖栵細鐐烘鍣ㄤ汉鎺у埗銆佹鍣ㄨ瑕烘彁渚涘挤澶х殑瑷堢畻骞宠嚭銆�
銆�銆�6. 鑸┖鑸ぉ鑸囧湅闃诧細鍩�(zh铆)琛屽畨鍏ㄩ棞閸典换鍕欙紝濡傝(w猫i)鏄熼�氫俊銆侀浄閬斾俊铏熻檿鐞嗐��
XCVU9P-3FLGA2104E
銆�銆�XCVU13P-3FLGA2104E
銆�銆�XCVU15P-3FLGA2104E
