鍨嬭櫉(h脿o)锛歑CVU095-3FFVC1517E
銆�銆�宸ヨ棟鍒剁▼锛�16nm
銆�銆�FPGA绯诲垪锛歎ltraScale+
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細绱�95钀�(w脿n)鍊�(g猫)
銆�銆�RAM璩囨簮锛�22Mb
銆�銆�DSP Slice鏁�(sh霉)閲忥細5800鍊�(g猫)
銆�銆�I/O寮曡叧鏁�(sh霉)锛�1517鍊�(g猫)
銆�銆�涓茶�屾敹鐧�(f膩)鍣ㄩ�熺巼锛氭渶楂樺彲閬�(d谩)32.75Gb/s
銆�銆�渚涢浕闆诲�擄��0.85V鏍稿績闆诲��
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��0掳C鑷�85掳C

XCVU095-3FFVC1517E鍏锋湁寮�(qi谩ng)澶х殑瑷�(j矛)绠楁�ц兘鍜岄珮搴﹂泦鎴愮殑鏋舵��(g貌u)銆�
銆�銆�1. 楂橀�熶覆琛屾敹鐧�(f膩)鍣ㄦ敮鎸佸�氱ó鍗�(xi茅)璀�锛屼緥濡侾CIe Gen4銆丆PRI銆丣ESD204B绛�锛屼娇鍏堕潪甯搁仼鍚堢敤浜庢暩(sh霉)鎿�(j霉)瀵嗛泦鍨嬫噳(y墨ng)鐢ㄣ��
銆�銆�2. 鍏�(n猫i)缃�浜嗗ぇ閲廌SP Slice锛岄�欎娇寰楁暩(sh霉)瀛椾俊铏�(h脿o)铏曠悊浠诲嫏(w霉)璁婂緱楂樻晥涓旈潏娲汇��
銆�銆�3. 鎻愪緵浜嗚睈瀵岀殑纭�鏍歌檿鐞嗗櫒妯″��锛屽�侫RM Cortex-A53铏曠悊鍣�锛岄��(j矛n)涓�姝ュ�炲��(qi谩ng)浜嗗叾鍦ㄥ祵鍏ュ紡绯荤当(t菕ng)涓�鐨勯仼鐢ㄦ��銆�
銆�銆�4. 鏀�鎸佸�氱ó閰嶇疆妯″紡锛屽寘鎷�寰為杻瀛樺暉鍕�(d貌ng)鎴栭�氶亷(gu貌)JTAG閫�(j矛n)琛屽�栭儴瑾�(di脿o)瑭�銆�
銆�銆�5. 鍏堥��(j矛n)鐨勬檪(sh铆)閻樼�＄悊鍜岄浕婧愬��(y艒u)鍖栨妧琛�(sh霉)纰轰繚浜嗙┅(w臎n)瀹氶亱(y霉n)琛屽拰杓冧綆鍔熻��銆�

閫欐�綟PGA寤ｆ硾鎳�(y墨ng)鐢ㄤ簬闇�瑕侀珮鎬ц兘瑷�(j矛)绠楄垏瀵�(sh铆)鏅�(sh铆)鏁�(sh霉)鎿�(j霉)铏曠悊鐨勯牁(l菒ng)鍩�銆�
銆�銆�1. 鏁�(sh霉)鎿�(j霉)涓�蹇冨姞閫熷崱锛氭彁渚涢珮鏁堢殑鎼滅储銆佹帓搴�銆佸姞瀵嗚В瀵嗙瓑鍔熻兘銆�
銆�銆�2. 缍�(w菐ng)绲�(lu貌)閫氫俊瑷�(sh猫)鍌欙細濡傝矾鐢卞櫒銆佷氦鎻涙��(j墨)涓�浣跨敤浠ュ��(sh铆)鐝�(xi脿n)楂橀�熸暩(sh霉)鎿�(j霉)鍖呰綁(zhu菐n)鐧�(f膩)銆�
銆�銆�3. 瑕栭牷寤ｆ挱绯荤当(t菕ng)锛氱敤浜庤�栭牷绶ㄧ⒓銆佽В纰煎強鍦栧儚澧炲挤(qi谩ng)铏曠悊銆�
銆�銆�4. 閱�(y墨)鐧傛垚鍍忚ō(sh猫)鍌欙細蹇�閫熷畬鎴愬奖鍍忛噸寤哄拰鍒嗘瀽銆�
銆�銆�5. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栨帶鍒讹細瀵�(sh铆)鏅�(sh铆)鐩�(ji膩n)鎺у拰绠＄悊寰�(f霉)闆滅殑鐢熺敘(ch菐n)绶氱挵(hu谩n)澧�銆�

XCVU095-2FFVC1517E
銆�銆�XCVU095-1FFVC1517E