XCVU080-2FFVB1760I 鏅�(sh铆)闁擄細2025/4/28 20:39:25 闁辫畝锛�33

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鍙冩暩(sh霉)

鍨嬭櫉(h脿o)锛歑CVU080-2FFVB1760I
銆€銆€灏佽锛欶FVB1760
銆€銆€閫熷害绛夌礆(j铆)锛�-2
銆€銆€閭忚集鍠厓鏁�(sh霉)锛氱磩 83K
銆€銆€DSP Slice 鏁�(sh霉)閲忥細5240
銆€銆€Block RAM 瀹归噺锛�54Mb
銆€銆€閰嶇疆闁冨瓨锛氫笉闆嗘垚
銆€銆€I/O 鏁�(sh霉)閲忥細鏈€澶� 1728
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆€銆€渚涢浕闆诲锛氬収(n猫i)鏍� 0.9V / 杓斿姪 1.0V

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XCVU080-2FFVB1760I 灞簬 Virtex UltraScale 绯诲垪 FPGA锛屽叿鏈変互涓嬮’钁楃壒鎬э細
銆€銆€1. 寮�(qi谩ng)澶х殑骞惰铏曠悊鑳藉姏锛岄仼鍚堝ぇ瑕�(gu墨)妯℃暩(sh霉)鎿�(j霉)閬�(y霉n)绠楀拰瀵�(sh铆)鏅�(sh铆)淇¤櫉(h脿o)铏曠悊浠诲嫏(w霉)銆�
銆€銆€2. 鍏�(n猫i)缃珮閫熶覆琛屾敹鐧�(f膩)鍣紝鏀寔楂橀仈(d谩) 32.75Gbps 鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼銆�
銆€銆€3. 闆嗘垚澶ч噺 Block RAM 鍜屽垎甯冨紡 RAM 璩囨簮锛屾豢瓒冲瓨鍎�(ch菙)瀵嗛泦鍨嬫噳(y墨ng)鐢ㄩ渶姹�銆�
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銆€銆€1. 鏁�(sh霉)鎿�(j霉)涓績鍔犻€燂細鐢ㄤ簬姗�(j墨)鍣ㄥ(xu茅)缈�(x铆)鎺ㄧ悊銆佹暩(sh霉)鎿�(j霉)鍒嗘瀽鍜岀恫(w菐ng)绲�(lu貌)铏涙摤鍖栫瓑鍔熻兘銆�
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