鏅傞枔锛�2025/5/10 12:43:21
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XCKU9P-3FFVE900I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� UltraScale 绯诲垪 FPGA 鑺墖锛屽爆浜� Kintex UltraScale 瀹舵棌銆傝┎绯诲垪鑺墖灏堢偤楂樻�ц兘瑷堢畻銆佺恫(w菐ng)绲¤檿鐞嗗拰淇¤櫉铏曠悊绛夋噳鐢ㄨ�岃ō瑷�锛屾彁渚涗簡璞愬瘜鐨勯倧杓硣婧�銆侀珮閫熶覆琛屾敹鐧�(f膩)鍣ㄤ互鍙婇潏娲荤殑 I/O 閰嶇疆銆�
銆�銆�姝ゅ瀷铏熶腑鐨勫叿楂斿弮鏁�(sh霉)瀹氱京濡備笅锛歑CKU 琛ㄧず Kintex UltraScale 绯诲垪锛�9P 琛ㄧず鍏烽珨鐨勮姱鐗囪(gu墨)妯＄瓑绱�锛�3 琛ㄧず閫熷害绛夌礆锛孎(xi脿n)FVE900 琛ㄧず灏佽椤炲瀷鍜屽紩鑵虫暩(sh霉)锛孖 琛ㄧず鍟嗙敤婧害鑼冨湇锛�0掳C 鑷� 85掳C锛�銆�
绯诲垪锛欿intex UltraScale
銆�銆�鍨嬭櫉锛歑CKU9P-3FFVE900I
銆�銆�閭忚集鍠厓锛氱磩 174,600 鍊�
銆�銆�DSP Slice锛�2,160 鍊�
銆�銆�Block RAM锛氱磩 44 Mbit
銆�銆�楂橀�熸敹鐧�(f膩)鍣ㄦ暩(sh霉)閲忥細32 閫氶亾
銆�銆�鏀剁櫦(f膩)鍣ㄩ�熺巼锛氭渶楂� 16.3 Gbps
銆�銆�I/O 鏁�(sh霉)閲忥細鏈�澶ф敮鎸� 840 鍊嬬敤鎴� I/O
銆�銆�灏佽锛欶FVE900
銆�銆�婧害鑼冨湇锛�0掳C 鑷� 85掳C
銆�銆�宸ヨ棟绡�(ji茅)榛烇細20nm
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹� 0.9V锛岃紨鍔╅浕澹� 1.0V
XCKU9P-3FFVE900I 鎻愪緵浜嗗崜瓒婄殑鎬ц兘鍜岄潏娲绘��锛岄仼鐢ㄤ簬澶氱ó楂樿姹傜殑鎳夌敤鍫存櫙銆備富瑕佺壒鎬у寘鎷細
銆�銆�1. 寮峰ぇ鐨勯倧杓硣婧愶細鎻愪緵瓒呴亷 17 钀�嬮倧杓柈鍏�锛岃兘澶犳豢瓒冲京闆滅畻娉曞拰澶ц(gu墨)妯℃暩(sh霉)鎿�(j霉)铏曠悊鐨勯渶姹�銆�
銆�銆�2. 楂橀�熶覆琛屾敹鐧�(f膩)鍣細鏀寔楂橀仈 16.3 Gbps 鐨勫偝杓搁�熺巼锛岄仼鍚堢敤浜庨珮閫熼�氫俊鎺ュ彛锛屼緥濡� PCIe Gen3 鍜� 100G 浠ュお缍�(w菐ng)銆�
銆�銆�3. DSP Slice锛氶泦鎴愪簡 2,160 鍊嬪皥鐢ㄦ暩(sh霉)瀛椾俊铏熻檿鐞嗘ā濉�锛岄’钁楁彁楂樹簡娴粸閬嬬畻鍜岀煩闄ｉ亱绠楃殑鑳藉姏銆�
銆�銆�4. 澶у閲� Block RAM锛氱磩 44Mbit 鐨勫瓨鍎插閲�锛屽彲鐢ㄤ簬鏁�(sh霉)鎿�(j霉)绶╂矕銆佹煡鎵捐〃鍜屽叾浠栧収瀛樺瘑闆嗗瀷浠诲嫏銆�
銆�銆�5. 闈堟椿鐨� I/O 閰嶇疆锛氭敮鎸佸绋婧栧崝(xi茅)璀帮紝濡� DDR4銆丵SPI 鍜� LVDS锛屽苟鍏佽ū鐢ㄦ埗鏍规摎(j霉)闇�姹傞�茶鑷畾缇╄ō缃�銆�
銆�銆�6. 鍏堥�茬殑 20nm 宸ヨ棟鍒剁▼锛氬湪淇濊瓑鎬ц兘鐨勫悓鏅傞檷浣庝簡鍔熻��锛屾彁楂樹簡鑳芥晥姣斻��
瑭茶姱鐗囧唬娉涙噳鐢ㄤ簬浠ヤ笅闋樺煙锛�
銆�銆�1. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浜庡姞閫熸湇鍕欏櫒宸ヤ綔璨犺級锛屼緥濡傛繁搴﹀缈掓帹鐞嗐�佽闋昏綁纰煎拰鏁�(sh霉)鎿�(j霉)鍒嗘瀽銆�
銆�銆�2. 閫氫俊瑷倷锛氶仼鐢ㄤ簬璺敱浜ゆ彌姗熴�佸熀绔欒檿鐞嗗拰鍏夊偝杓哥恫(w菐ng)绲′腑鐨勬暩(sh霉)鎿�(j霉)鍖呰檿鐞�銆�
銆�銆�3. 閱�(y墨)鐧傛垚鍍忥細瀵︾従(xi脿n)楂樻�ц兘鍦栧儚铏曠悊鍜屽鏅傚垎鏋愬姛鑳�銆�
銆�銆�4. 宸ユキ(y猫)鑷嫊鍖栵細鎺у埗寰╅洔鐨勫伐妤�(y猫)娴佺▼骞跺煼(zh铆)琛屽揩閫熷弽楗嬭鏁淬��
銆�銆�5. 宓屽叆寮忚瑕虹郴绲�(t菕ng)锛氭敮鎸佽▓绠楁瑕栬浠诲嫏锛屼緥濡傜洰妯欐娓拰鍒嗛銆�
銆�銆�6. 娓│鑸囨脯閲忥細妲嬪缓楂樻晥鐨勬暩(sh霉)鎿�(j霉)閲囬泦鍜屼俊铏熺敓鎴愬钩鑷�銆�
XCKU9P-2FFVE900I
銆�銆�XCKU9P-3FFVC1140E
