XCKU115-3FLVF1924E 鏅�(sh铆)闁擄細2025/5/20 19:15:51 闁辫畝锛�18

XCKU115-3FLVF1924E 鏄竴娆剧敱 Xilinx锛堣辰闈堟€濓級鍏徃鐢熺敘(ch菐n)鐨� Kintex UltraScale 绯诲垪 FPGA 鑺墖銆傝┎绯诲垪鑺墖寤ｆ硾鎳�(y墨ng)鐢ㄤ簬閫氫俊銆佽埅绌鸿埅澶�銆佸伐妤�(y猫)鑷嫊(d貌ng)鍖�銆佹暩(sh霉)鎿�(j霉)涓績鍔犻€熺瓑闋�(l菒ng)鍩熴€俋CKU115 鎻愪緵楂樻€ц兘閭忚集璩囨簮銆佽睈瀵岀殑 DSP 妯″浠ュ強楂橀€熶覆琛屾敹鐧�(f膩)鍣�锛岄仼鐢ㄤ簬闇€瑕侀珮甯跺鍜屽京(f霉)闆滅畻娉曡檿鐞嗙殑鎳�(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆�
銆€銆€閫欐鍨嬭櫉(h脿o)鐨勮姱鐗囬噰鐢� 16nm FinFET 鍒剁▼宸ヨ棟鍒堕€�锛屽叿鏈変綆鍔熻€楀拰楂橀泦鎴愬害鐨勭壒榛�(di菐n)锛屽悓鏅�(sh铆)鏀寔澶氱ó鎺ュ彛鍗�(xi茅)璀板 PCIe銆丏DR4 鍜� 100G Ethernet銆�

鍙冩暩(sh霉)

鍣ㄤ欢椤炲瀷锛欶PGA
銆€銆€鍒剁▼宸ヨ棟锛�16nm
銆€銆€閭忚集鍠厓鏁�(sh霉)閲忥細绱� 115K
銆€銆€DSP Slice 鏁�(sh霉)閲忥細2880
銆€銆€RAM 璩囨簮锛氱磩 7.7Mb
銆€銆€閰嶇疆妯″紡锛歋electMAP, Master SPI, Slave SPI
銆€銆€I/O 寮曡叧鏁�(sh霉)锛�1924
銆€銆€渚涢浕闆诲鑼冨湇锛�0.9V 鏍稿績闆诲 / 1.0V 杓斿姪闆诲 / 1.8V I/O 闆诲
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆€銆€灏佽褰㈠紡锛欶FG1924
銆€銆€閫熷害绛夌礆(j铆)锛�-3

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XCKU115-3FLVF1924E 鐨勪富瑕佺壒鎬у寘鎷細
銆€銆€1. 楂樻€ц兘瑷�(j矛)绠楄兘鍔�锛屾敮鎸佸ぇ瑕�(gu墨)妯″苟琛屾暩(sh霉)鎿�(j霉)铏曠悊銆�
銆€銆€2. 鍏�(n猫i)缃珮鎬ц兘涓茶鏀剁櫦(f膩)鍣�锛岄€熺巼鍙仈(d谩) 32.75 Gbps銆�
銆€銆€3. 鏀寔澶氬崝(xi茅)璀版帴鍙�锛屽寘鎷� PCI Express Gen3 x8銆丏DR4/LPDDR4 鍏�(n猫i)瀛樻帶鍒跺櫒鍜� 100G Ethernet MAC銆�
銆€銆€4. 闆嗘垚 Block RAM 鍜� Distributed RAM锛屽彲闈堟椿閰嶇疆鐢ㄤ簬瀛樺劜(ch菙)鏁�(sh霉)鎿�(j霉)鎴�?q奴)宕縁(xi脿n) FIFO 鍔熻兘銆�
銆€銆€5. 鍏�(n猫i)缃� DSP48E2 妯″锛屾彁渚涢珮鏁堟诞榛�(di菐n)閬�(y霉n)绠楁敮鎸�銆�
銆€銆€6. 鏀寔澶氱ó閰嶇疆妯″紡浠ラ仼鎳�(y墨ng)涓嶅悓鐨勬噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅渶姹�銆�
銆€銆€7. 楂樺彲闈犳€цō(sh猫)瑷�(j矛)锛岄仼鐢ㄤ簬鍤�(y谩n)鑻涚挵(hu谩n)澧冧笅鐨勯暦鏈熼亱(y霉n)琛�銆�
銆€銆€8. 鏀寔 Partial Reconfiguration 鎶€琛�(sh霉)锛屽厑瑷卞湪绯荤当(t菕ng)閬�(y霉n)琛屾檪(sh铆)鍕�(d貌ng)鎱�(t脿i)鏇存柊閮ㄥ垎鍔熻兘妯″銆�

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XCKU115-3FLVF1924E 鍙噳(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆€銆€1. 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂斤紝渚嬪 5G 鍩虹珯涓殑淇¤櫉(h脿o)铏曠悊鍜屽崝(xi茅)璀拌綁(zhu菐n)鎻�銆�
銆€銆€2. 鏁�(sh霉)鎿�(j霉)涓績鍔犻€熷崱锛岀敤浜庢暩(sh霉)鎿�(j霉)搴煡瑭㈠劒(y艒u)鍖栧拰姗�(j墨)鍣ㄥ(xu茅)缈�(x铆)鎺ㄧ悊銆�
銆€銆€3. 閱�(y墨)鐧傚奖鍍忚ō(sh猫)鍌欙紝瀵�(sh铆)鐝�(xi脿n)瀵�(sh铆)鏅�(sh铆)鍦栧儚铏曠悊鍜屽垎鏋�銆�
銆€銆€4. 宸ユキ(y猫)鑷嫊(d貌ng)鍖栨帶鍒剁郴绲�(t菕ng)锛屽畬鎴愬京(f霉)闆滅殑閬�(y霉n)鍕�(d貌ng)鎺у埗鍜屾暩(sh霉)鎿�(j霉)閲囬泦浠诲嫏(w霉)銆�
銆€銆€5. 鑸┖鑸ぉ闋�(l菒ng)鍩熺殑灏�(d菐o)鑸垏閬欐劅鎶€琛�(sh霉)銆�
銆€銆€6. 瑕栭牷寤ｆ挱绯荤当(t菕ng)涓殑瑕栭牷绶ㄧ⒓瑙ｇ⒓鍜屾牸寮忚綁(zhu菐n)鎻�銆�
銆€銆€7. 鑷嫊(d貌ng)椐曢姹借粖涓殑鍌虫劅鍣ㄨ瀺鍚堝拰姹虹瓥绠楁硶鍩�(zh铆)琛屻€�