XCKU115-3FLVD1517E 鏅�(sh铆)闁擄細2025/4/29 14:02:47 闁辫畝锛�37

XCKU115-3FLVD1517E 鏄竴娆剧敱 Xilinx 鍏徃鐢熺敘(ch菐n)鐨� Kintex UltraScale 绯诲垪 FPGA 鑺墖銆傝┎绯诲垪鑺墖鍩轰簬 20nm 宸ヨ棟鍒剁▼锛屽叿鏈夐珮甯跺銆佷綆寤堕伈鍜屽彲鎿�(ku貌)灞曟€у挤(qi谩ng)鐨勭壒榛�(di菐n)锛岄仼鐢ㄤ簬楂樻€ц兘瑷�(j矛)绠�銆侀€氫俊鍩虹(ch菙)瑷�(sh猫)鏂�銆佽埅绌鸿埅澶╄垏鍦�(gu贸)闃茬瓑闋�(l菒ng)鍩熺殑寰�(f霉)闆滆ō(sh猫)瑷�(j矛)闇€姹傘€�
銆€銆€瑭插瀷铏�(h脿o)鐨� FPGA 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆丏SP 妯″浠ュ強楂橀€熶覆琛屾敹鐧�(f膩)鍣�锛屾敮鎸佸绋帴鍙ｅ崝(xi茅)璀帮紝渚嬪 PCIe銆丏DR4 鍜� CPRI 绛�锛岃兘澶犳豢瓒冲妯ｅ寲鐨勮ō(sh猫)瑷�(j矛)瑕佹眰銆�

鍙冩暩(sh霉)

閭忚集鍠厓锛�115K
銆€銆€閰嶇疆妯″紡锛�?ji菐n)?boot SPI Flash
銆€銆€I/O 鏁�(sh霉)閲忥細844
銆€銆€DSP Slice锛�2880
銆€銆€鍏�(n猫i)閮ㄥ瓨鍎�(ch菙)鍣細6800 KB
銆€銆€鏈€澶у伐浣滈牷鐜囷細1000 MHz
銆€銆€宸ヨ棟鍒剁▼锛�20 nm
銆€銆€渚涢浕闆诲锛�1.0V 鏍稿績闆诲, 1.8V I/O 闆诲
銆€銆€灏佽椤炲瀷锛欶FG1517

鐗规€�

XCKU115-3FLVD1517E 鎻愪緵寮�(qi谩ng)澶х殑骞惰铏曠悊鑳藉姏锛岄仼鍚堥渶瑕佸(sh铆)鏅�(sh铆)鏁�(sh霉)鎿�(j霉)铏曠悊鐨勬噳(y墨ng)鐢ㄥ牬(ch菐ng)鏅�銆傚畠闆嗘垚浜嗗ぇ閲� DSP 妯″锛屽彲浠ュ姞閫熸暩(sh霉)瀛�(xu茅)閬�(y霉n)绠楀拰淇¤櫉(h脿o)铏曠悊浠诲嫏(w霉)銆傛澶�锛岄€欐 FPGA 鏀寔楂橀仈(d谩) 32.75 Gbps 鐨勯珮閫熸敹鐧�(f膩)鍣ㄩ€熺巼锛屽苟涓斿吋瀹硅姱鐗囬倓鍏峰倷闈堟椿鐨勬檪(sh铆)閻樼鐞嗗姛鑳藉拰璞愬瘜鐨勮(di脿o)瑭﹀伐鍏凤紝渚夸簬闁�(k膩i)鐧�(f膩)浜哄摗鍎�(y艒u)鍖栬ō(sh猫)瑷�(j矛)鎬ц兘銆傞€氶亷(gu貌)浣跨敤 Vivado 瑷�(sh猫)瑷�(j矛)濂椾欢锛屽伐绋嬪斧鍙互杓曟澗瀵�(sh铆)鐝�(xi脿n)楂樺堡娆＄稖鍚堝拰 IP 闆嗘垚锛屽緸鑰屽姞蹇敘(ch菐n)鍝佷笂甯傛檪(sh铆)闁�銆�
銆€銆€鍚屾檪(sh铆)锛孠intex UltraScale 绯诲垪鍦ㄥ姛鑰楁帶鍒舵柟闈㈣〃鐝�(xi脿n)鍑鸿壊锛岃兘澶犲湪淇濊瓑鎬ц兘鐨勫悓鏅�(sh铆)闄嶄綆鑳芥簮娑堣€�銆�

鎳�(y墨ng)鐢�

瑭� FPGA 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬鐒�(w煤)绶氬熀绔�銆佹湁绶氱恫(w菐ng)绲�(lu貌)瑷�(sh猫)鍌欍€佽闋诲唬鎾郴绲�(t菕ng)銆佸湒鍍忚檿鐞嗗钩鑷�(t谩i)浠ュ強闆烽仈(d谩)绯荤当(t菕ng)绛夐牁(l菒ng)鍩�銆傚叿楂斿寘鎷細
銆€銆€1. 閫氫俊闋�(l菒ng)鍩� - 瀵�(sh铆)鐝�(xi脿n) MAC/PHY 灞ゅ姛鑳姐€佸墠鍌�/鍥炲偝閺堣矾铏曠悊銆�
銆€銆€2. 鏁�(sh霉)鎿�(j霉)涓績 - 鍩�(zh铆)琛屽寘鍒嗛銆佸姞瀵嗚В瀵嗘搷浣�銆�
銆€銆€3. 宸ユキ(y猫)鑷嫊(d貌ng)鍖� - 鎺у埗姗�(j墨)鍣ㄤ汉閬�(y霉n)鍕�(d貌ng)銆佺洠(ji膩n)娓�(c猫)宸ユキ(y猫)鍌虫劅鍣ㄦ暩(sh霉)鎿�(j霉)銆�
銆€銆€4. 閱�(y墨)鐧傛垚鍍� - 铏曠悊 CT銆丮RI 鍦栧儚閲嶅缓绠楁硶銆�
銆€銆€5. 杌嶄簨鍦�(gu贸)闃� - 闁�(k膩i)鐧�(f膩)闆诲瓙灏�(du矛)鎶楄ō(sh猫)鍌欏強灏�(d菐o)鑸郴绲�(t菕ng)銆�