鏅傞枔锛�2025/5/8 9:38:03
闁辫畝锛�18
XCKU040-L1FBVA676I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� UltraScale 绯诲垪 FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛夎姱鐗�銆傝┎绯诲垪 FPGA 鎻愪緵楂樻�ц兘銆侀珮瀵嗗害閭忚集璩囨簮锛岄仼鐢ㄤ簬寰╅洔瑷堢畻浠诲嫏鍜岄珮甯跺鎳夌敤銆傛鍨嬭櫉閲囩敤 20nm 宸ヨ棟鍒剁▼锛屽叿鏈夎睈瀵岀殑 DSP Slice 鍜� Block RAM 璩囨簮锛屽悓鏅傛敮鎸佸绋珮閫熸帴鍙ｅ崝(xi茅)璀�銆�
銆�銆�UltraScale 鏋舵(g貌u)閫氶亷寮曞叆鏂扮殑浜掗�ｇ祼(ji茅)妲�(g貌u)鍜屽劒(y艒u)鍖栫殑鏅傞悩缍�(w菐ng)绲¤ō(sh猫)瑷�锛屽ぇ骞呮彁鍗囦簡鑺墖鎬ц兘鍜屽姛鑰楁晥鐜�銆俋CKU040 涓昏鐢ㄤ簬闇�瑕侀珮搴﹀苟琛岃檿鐞嗚兘鍔涚殑鍫村悎锛屼緥濡傞�氫俊鍩虹(ch菙)瑷�(sh猫)鏂�銆佹暩(sh霉)鎿�(j霉)涓績鍔犻��銆佸湒鍍忚檿鐞嗗拰宓屽叆寮忚瑕虹郴绲�(t菕ng)銆�
鍨嬭櫉锛歑CKU040-L1FBVA676I
銆�銆�灏佽锛歀1FBVA676
銆�銆�宸ヨ棟鍒剁▼锛�20nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細绱� 40K CLB
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2880
銆�銆�Block RAM 瀹归噺锛氱磩 27.5 Mb
銆�銆�閰嶇疆闁冨瓨锛氱劇鐗囦笂闁冨瓨锛岄渶澶栨帴閰嶇疆鑺墖
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�676
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�鏍稿績闆诲锛�0.9V
銆�銆�I/O 闆诲锛�1.8V / 3.3V
XCKU040-L1FBVA676I 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 楂樻�ц兘鏋舵(g貌u)锛氬熀浜� UltraScale 鎶�琛�(sh霉)锛屾彁渚涙洿楂樼殑鍚炲悙閲忓拰鏇翠綆鐨勫欢閬�銆�
銆�銆�2. 澶у閲忓瓨鍎诧細鍏�(n猫i)缃ぇ閲� Block RAM 鍜屽垎甯冨紡 RAM 璩囨簮锛屾豢瓒虫暩(sh霉)鎿�(j霉)瀵嗛泦鍨嬫噳鐢ㄩ渶姹�銆�
銆�銆�3. DSP 鏀寔锛氶厤鍌欏皥鐢� DSP Slice锛岃兘澶犻珮鏁堝鐝�(xi脿n)娴粸閬嬬畻鍜屾暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�4. 楂橀�熶覆琛屾敹鐧�(f膩)鍣細鏀寔楂橀仈 28Gbps 鐨勬敹鐧�(f膩)閫熺巼锛岄仼鍚堢従(xi脿n)浠ｉ�氫俊妯欐簴銆�
銆�銆�5. 鍙摯灞曟�э細闈堟椿鐨勯倧杓祼(ji茅)妲�(g貌u)鍜� I/O 鎺ュ彛瑷�(sh猫)瑷堬紝渚夸簬閬╂噳澶氱ó鎳夌敤鍫存櫙銆�
銆�銆�6. 鍔熻�楃鐞嗭細閫氶亷鍕曟厠(t脿i)鍔熻�楄(di脿o)绡�(ji茅)鎶�琛�(sh霉)闄嶄綆閬嬭鑳借��銆�
銆�銆�7. 鐢熸厠(t脿i)绯荤当(t菕ng)鏀寔锛氬吋瀹� Vivado 闁嬬櫦(f膩)宸ュ叿閺�锛屽苟鎻愪緵璞愬瘜鐨� IP 鏍稿拰鍙冭�冭ō(sh猫)瑷堛��
XCKU040-L1FBVA676I 寤ｆ硾鎳夌敤浜庝互涓嬮牁(l菒ng)鍩燂細
銆�銆�1. 閫氫俊瑷�(sh猫)鍌欙細濡傜劇绶氬熀绔�銆佽矾鐢卞櫒鍜屼氦鎻涙涓殑鏁�(sh霉)鎿�(j霉)鍖呰檿鐞嗗拰淇¤櫉瑾�(di脿o)鍒惰В瑾�(di脿o)銆�
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浣滅‖浠跺姞閫熷崱鐨勬牳蹇冪祫浠�锛屾彁鍗囨悳绱�銆佸姞瀵嗚В瀵嗙瓑鍔熻兘鐨勯�熷害銆�
銆�銆�3. 瑕栭牷铏曠悊锛氭敮鎸侀珮娓呭強瓒呴珮娓呰闋荤法纰艰В纰�銆佸湒鍍忓寮风瓑瀵︽檪铏曠悊浠诲嫏銆�
銆�銆�4. 宓屽叆寮忕郴绲�(t菕ng)锛氬湪宸ユキ(y猫)鑷嫊鍖栥�侀啱(y墨)鐧傛垚鍍忓拰姹借粖闆诲瓙涓彁渚涘挤澶х殑鎺у埗鑸囪▓绠楄兘鍔�銆�
銆�銆�5. 瑷堢畻鍔犻�燂細鐐烘鍣ㄥ缈掓帹鐞嗐�佺瀛歌▓绠楃瓑闋�(l菒ng)鍩熸彁渚涚‖浠跺姞閫熷钩鑷�銆�
XCKU060-1FFVA1156E, XCKU035-1FFVA1156E
