灏佽�濓細CLG400
銆�銆�鍏�(n猫i)鏍告暩(sh霉)閲忥細2
銆�銆�铏曠悊鍣ㄩ�炲瀷锛欰RM Cortex-A9
銆�銆�涓婚牷鑼冨湇锛�667 MHz
銆�銆�FPGA 閭忚集鍠�鍏冿��28,000
銆�銆�RAM 瀹归噺锛�530 KB
銆�銆�閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)缃�
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�361
銆�銆�鍒剁▼宸ヨ棟锛�28 nm
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +85掳C

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銆�銆�5. 鎻愪緵 AMBA AXI 浜掗�ｇ祼(ji茅)妲�(g貌u)锛岀敤浜� PS 鍜� PL 涔嬮枔鐨勯珮鏁堟暩(sh霉)鎿�(j霉)鍌宠几銆�
銆�銆�6. 闆嗘垚闆绘簮绠＄悊鍠�鍏冿紝闄嶄綆鏁撮珨鍔熻�楀苟鍎�(y艒u)鍖栨�ц兘琛ㄧ従(xi脿n)銆�
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1. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栨帶鍒惰ō(sh猫)鍌欙紝濡� PLC銆丠MI 鍜岄亱(y霉n)鍕�(d貌ng)鎺у埗鍣ㄣ��
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銆�銆�3. 姹借粖闆诲瓙绯荤当(t菕ng)锛屽�� ADAS锛堥珮绱�(j铆)椐曢�涜紨鍔╃郴绲�(t菕ng)锛夋垨杌婅級淇℃伅濞涙▊绯荤当(t菕ng)銆�
銆�銆�4. 瑕栭牷鐩�(ji膩n)鎺у拰鍦栧儚铏曠悊瑷�(sh猫)鍌�锛屽�傞珮娓� IP 鏀濆儚闋�銆�
銆�銆�5. 閫氫俊鍩虹��(ch菙)瑷�(sh猫)鏂戒腑鐨勫皬鍨嬪熀绔欏拰璺�鐢卞櫒銆�
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XC7Z010-2CLG400I, XC7Z010-3CLG400C