鏅傞枔锛�2025/4/29 9:59:19
闁辫畝锛�31
XC7Z010-1CLG225C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Zynq-7000 绯诲垪 All Programmable SoC 鐨勪竴娆惧瀷铏�銆傝┎鍣ㄤ欢灏� ARM Cortex-A9 铏曠悊鍣ㄨ垏鍙法绋嬮倧杓紙FPGA锛夐泦鎴愬湪鍚屼竴鑺墖涓�锛屾彁渚涗簡楂樻�ц兘銆侀珮闈堟椿鎬х殑瑙ｆ焙鏂规銆傞仼鐢ㄤ簬宸ユキ(y猫)鑷嫊鍖�銆侀�氫俊瑷倷銆佸祵鍏ュ紡瑕栬鍜岄啱(y墨)鐧傛垚鍍忕瓑闋�(l菒ng)鍩熺殑寰╅洔绯荤当(t菕ng)瑷▓銆�
銆�銆�瑭茬郴鍒楀櫒浠剁祼(ji茅)鍚堜簡铏曠悊鍣ㄧ殑杌熶欢鍙法绋嬫�у拰 FPGA 鐨勭‖浠跺彲绶ㄧ▼鎬э紝鍏佽ū闁嬬櫦(f膩)浜哄摗鍦ㄥ柈鍊嬪櫒浠朵腑瀵︾従(xi脿n)寰╅洔鐨勭畻娉曞姞閫�銆佸鏅備俊铏熻檿鐞嗕互鍙婇�氱敤瑷堢畻浠诲嫏銆�
鍨嬭櫉锛歑C7Z010-1CLG225C
銆�銆�宸ヨ棟锛�28nm
銆�銆�灏佽锛欳LG225
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�ARM铏曠悊鍣細闆欐牳 ARM Cortex-A9
銆�銆�涓婚牷锛�667 MHz
銆�銆�鐗囦笂瀛樺劜鍣細280KB
銆�銆�FPGA鏋舵(g貌u)锛欰rtix-7
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細28K
銆�銆�RAM濉婂閲忥細1148Kb
銆�銆�DSP Slice鏁�(sh霉)閲忥細90
銆�銆�I/O寮曡叧鏁�(sh霉)閲忥細214
銆�銆�閰嶇疆闁冨瓨鏀寔锛氫笉鍏�(n猫i)缃�
銆�銆�鍔熻�楋細闈滄厠(t脿i)鍔熻�楃磩 1W锛屽嫊鎱�(t脿i)鍔熻�楀彇姹轰簬鍏烽珨鎳夌敤
XC7Z010-1CLG225C 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 闆嗘垚浜嗛洐鏍� ARM Cortex-A9 MPCore 铏曠悊鍣ㄥ瓙绯荤当(t菕ng)锛屽叿鏈� NEON 鍜� FPU 鍗�(xi茅)铏曠悊鍣�锛屾敮鎸侀珮鏁堢殑娴粸閬嬬畻鍜屽濯掗珨铏曠悊銆�
銆�銆�2. 鍏�(n猫i)缃睈瀵岀殑澶栬ō鎺ュ彛鎺у埗鍣�锛屼緥濡� Gigabit Ethernet銆乁SB銆丼DIO銆丆AN 鍜� UART 绛�锛岀啊鍖栦簡宓屽叆寮忕郴绲�(t菕ng)鐨勯�ｆ帴銆�
銆�銆�3. 鍙法绋嬮倧杓儴鍒嗗熀浜� Artix-7 FPGA 鏋舵(g貌u)锛屾彁渚涢潏娲荤殑纭欢鍔犻�熻兘鍔�锛屾敮鎸佽嚜瀹氱京 IP 鏍哥殑瀵︾従(xi脿n)銆�
銆�銆�4. 鏀寔 AXI 绺界窔鏋舵(g貌u)锛屽鐝�(xi脿n)铏曠悊鍣ㄥ拰 FPGA 閭忚集涔嬮枔鐨勯珮鏁堟暩(sh霉)鎿�(j霉)鍌宠几銆�
銆�銆�5. 鎻愪緵澶氱ó闆绘簮绠＄悊閬搁爡锛屽寘鎷嫊鎱�(t脿i)闆诲瑾�(di脿o)绡�(ji茅)鍜屾檪閻橀杸鎺ф妧琛�(sh霉)锛屼互闄嶄綆鏁撮珨鍔熻��銆�
銆�銆�6. 鍖呮嫭鍏�(n猫i)閮� PLL 鍜� DCM 妯″锛屾敮鎸侀潏娲荤殑鏅傞悩鐢熸垚鍜屽垎閰嶅姛鑳姐��
銆�銆�7. 楂樺害闆嗘垚鐨勮ō瑷堟笡灏戜簡鏉跨礆鍏冧欢鏁�(sh霉)閲�锛岄檷浣庝簡绯荤当(t菕ng)鎴愭湰骞舵彁楂樹簡鍙潬鎬с��
銆�銆�8. 闁嬬櫦(f膩)宸ュ叿鏀寔鑹ソ锛屼娇鐢� Vivado Design Suite 鍜� SDK 宸ュ叿鍙互蹇�熷畬鎴愯粺纭欢鍗�(xi茅)鍚岃ō瑷堛��
銆�銆�9. 鎻愪緵鍏ㄩ潰鐨勫畨鍏ㄧ壒鎬�锛屽 AES 鍔犲瘑寮曟搸銆丼HA 鍜� RSA 瑾嶈瓑妯″锛岀⒑淇濈郴绲�(t菕ng)瀹夊叏鎬�銆�
XC7Z010-1CLG225C 寤ｆ硾鎳夌敤浜庝互涓嬮牁(l菒ng)鍩燂細
銆�銆�1. 宓屽叆寮忚瑕虹郴绲�(t菕ng)锛氬姗熷櫒瑕栬鐩告銆佽闋荤洠(ji膩n)鎺цō鍌�銆�
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栵細鐢ㄤ簬閬嬪嫊鎺у埗銆佹鍣ㄤ汉鎺у埗鍜屽伐妤�(y猫)鐗╄伅(li谩n)缍�(w菐ng)缍�(w菐ng)闂�(gu膩n)銆�
銆�銆�3. 閫氫俊瑷倷锛氬灏忓瀷鍩虹珯銆佺劇绶氭帴鍏ラ粸鍜屽崝(xi茅)璀拌綁(zhu菐n)鎻涘櫒銆�
銆�銆�4. 閱�(y墨)鐧傝ō鍌欙細鍖呮嫭瓒呰伈娉㈣ō鍌�銆佷究鏀滃紡瑷烘柗鍎�鍣�銆�
銆�銆�5. 娑堣不闆诲瓙锛氶珮绔煶瑕栭牷铏曠悊瑷倷銆佹櫤鑳藉灞呮帶鍒跺櫒銆�
銆�銆�6. 鑸┖鑸ぉ鍜屽湅闃诧細闇�瑕侀珮鍙潬鎬у拰浣庡欢閬茬殑鎳夌敤鍫存櫙銆�
銆�銆�鍏堕潏娲绘�у拰楂樻�ц兘浣垮叾鎴愮偤澶氶牁(l菒ng)鍩熷京闆滄噳鐢ㄧ殑鐞嗘兂閬告搰銆�
XC7Z010-2CLG225C
銆�銆�XC7Z010-3CLG225C
