鏅傞枔锛�2025/5/13 17:18:41
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XC7VX415T-2FFG1158C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Virtex-7 绯诲垪 FPGA 鑺墖涔嬩竴锛屽爆浜庨珮绔� FPGA 绯诲垪銆傝┎绯诲垪鑺墖閲囩敤鑷虹⿳闆� 28nm 鍒剁▼宸ヨ棟鍒堕��锛屽叿鏈夐珮閭忚集瀵嗗害銆侀珮鎬ц兘鍜屼綆鍔熻�楃殑鐗归粸銆俋C7VX415T 闆嗘垚浜嗚睈瀵岀殑 DSP Slice銆丅lock RAM 鍜岄珮閫熶覆琛屾敹鐧�(f膩)鍣ㄨ硣婧愶紝閬╃敤浜庨�氫俊銆佽埅绌鸿埅澶┿�佸唬鎾闋昏檿鐞嗕互鍙婇珮鎬ц兘瑷堢畻绛夐牁鍩熺殑寰╅洔瑷▓闇�姹�銆�
銆�銆�姝ゅ瀷铏熶腑鐨勫悗缍� '-2FFG1158C' 琛ㄧず鍏堕�熷害绛夌礆鐐� -2锛屽皝瑁濆舰寮忕偤 FFG1158锛�1158 寮曡叧锛�锛屽伐浣滄韩搴﹁寖鍦嶇偤鍟嗘キ(y猫)绱氾紙C锛夈��
鍣ㄤ欢椤炲瀷锛欶PGA
銆�銆�绯诲垪锛歏irtex-7
銆�銆�鍒剁▼宸ヨ棟锛�28nm
銆�銆�閭忚集鍠厓鏁�(sh霉)锛氱磩 415K CLB Slices
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2760
銆�銆�Block RAM 瀹归噺锛氱磩 27.5MB
銆�銆�閰嶇疆闁冨瓨锛氱劇鍏х疆闁冨瓨锛岄渶澶栨帴閰嶇疆瀛樺劜
銆�銆�I/O 鏁�(sh霉)閲忥細鏈�澶ф敮鎸� 840 鍊嬬敤鎴� I/O
銆�銆�楂橀�熸敹鐧�(f膩)鍣ㄦ暩(sh霉)閲忥細96 閫氶亾
銆�銆�鏀剁櫦(f膩)鍣ㄩ�熺巼鑼冨湇锛氭渶楂樺彲閬� 13.1 Gbps
銆�銆�渚涢浕闆诲锛氭牳蹇冮浕澹撶偤 1.0V锛孖/O 闆诲渚濇摎(j霉)涓嶅悓 bank 鍙厤缃�
銆�銆�灏佽锛欶FG1158
銆�銆�閫熷害绛夌礆锛�-2
XC7VX415T 鎻愪緵浜嗗崜瓒婄殑鎬ц兘鍜岄潏娲绘��锛屼互涓嬫槸鍏朵富瑕佺壒鎬э細
銆�銆�1. 楂橀�熶覆琛屾敹鐧�(f膩)鍣ㄦ敮鎸侀珮閬� 13.1Gbps 鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼锛岄潪甯搁仼鍚堥珮甯跺閫氫俊鎳夌敤銆�
銆�銆�2. 鍏х疆璞愬瘜鐨� DSP Slice锛屾瘡鍊� DSP Slice 鏀寔澶氶仈 27x18 浣嶄箻娉曞櫒锛岃兘澶犲鐝�(xi脿n)寰╅洔鐨勬暩(sh霉)瀛搁亱绠楀拰淇¤櫉铏曠悊鍔熻兘銆�
銆�銆�3. 澶у閲� Block RAM 鍜屽垎甯冨紡 RAM 绲愭鏀寔楂樻晥鐨勫瓨鍎插櫒绠＄悊锛屽彲婊胯冻澶氱ó鏁�(sh霉)鎿�(j霉)绶╁瓨鍜屾煡鎵捐〃鐨勯渶姹�銆�
銆�銆�4. 鏀寔澶氱ó閰嶇疆妯″紡锛屽寘鎷緸 SPI Flash 鎴� PROM 閫茶澶栭儴鍔犺級閰嶇疆銆�
銆�銆�5. 闆嗘垚 PLL 鍜� MMCM 妯″锛屽彲浠ラ潏娲荤敓鎴愬悇绋檪閻橀牷鐜囧苟鎻愪緵绮炬簴鐨勬檪閻樼鐞嗗姛鑳�銆�
銆�銆�6. 鍏锋湁寮峰ぇ鐨勫姛鑰楀劒(y艒u)鍖栬兘鍔涳紝鏀寔鍕曟厠(t脿i)鍔熻�楄绡�(ji茅)鎶�琛撲互閬╂噳涓嶅悓鐨勫伐浣滃牬鏅�銆�
銆�銆�7. 鎻愪緵寤ｆ硾鐨勬帴鍙ｆ婧栨敮鎸侊紝渚嬪 PCIe Gen3銆丼ATA銆乁SB 3.0 鍜屽崈鍏嗕互澶恫绛�銆�
XC7VX415T-2FFG1158C 涓昏鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊鍩虹瑷柦锛屽鍩虹珯銆佽矾鐢卞櫒鍜屼氦鎻涙瑷倷涓殑淇¤櫉铏曠悊鑸囧崝(xi茅)璀拌綁鎻涖��
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銆�銆�3. 閱�(y墨)鐧傚奖鍍忕郴绲�(t菕ng)锛屾敮鎸佽秴鑱叉尝鍜� CT 鎺冩弿瑷倷涓殑鍦栧儚閲嶅缓鑸囧垎鏋�銆�
銆�銆�4. 楂樻�ц兘瑷堢畻锛屽彲鐢ㄤ簬閲戣瀺寤烘ā銆佹鍣ㄥ缈掕〒绶村拰鍏朵粬闇�瑕佸ぇ瑕�(gu墨)妯″苟琛岃▓绠楃殑浠诲嫏銆�
銆�銆�5. 鑸┖鑸ぉ鑸囧湅闃查牁鍩�锛屼緥濡傞浄閬斾俊铏熻檿鐞嗗拰琛�(w猫i)鏄熼�氫俊绯荤当(t菕ng)鐨勯枊鐧�(f膩)銆�
銆�銆�6. 娓│娓噺鍎�鍣�锛屽寘鎷ず娉㈠櫒銆侀牷璀滃垎鏋愬剙绛夊姛鑳芥ā濉婄殑瑷▓銆�
XC7VX415T-3FFG1158C
銆�銆�XC7VX415T-2FFG1761C
銆�銆�XC7VX415T-3FFG1761C
