鏅傞枔锛�2025/4/27 16:34:58
闁辫畝锛�38
XC7S50-1FGGA484C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Artix-7 绯诲垪 FPGA 鑺墖涓殑涓�鍊嬪瀷铏�銆傝┎绯诲垪鑺墖閲囩敤 28nm 宸ヨ棟鍒剁▼锛屽叿鏈夐珮鎬ц兘銆佷綆鍔熻�楃殑鐗归粸锛岄仼鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)鎺у埗銆佽埅绌鸿埅澶╃瓑闋樺煙銆俋C7S50 鎻愪緵璞愬瘜鐨勯倧杓硣婧愬拰 DSP 妯″锛屾敮鎸佸绋帴鍙ｅ崝(xi茅)璀帮紝鑳藉婊胯冻寰╅洔鏁�(sh霉)瀛楅浕璺ō瑷堢殑闇�姹�銆�
銆�銆�Artix-7 绯诲垪 FPGA 鐨勪竴澶у劒(y艒u)鍕㈡槸鍏跺収(n猫i)缃殑楂橀�熸敹鐧�(f膩)鍣紝鍙鐝�(xi脿n)楂橀仈 1.25Gbps 鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼锛屽悓鏅傚叿鍌欓潏娲荤殑鏅傞悩绠＄悊鍠厓鍜屽ぇ瀹归噺鐨勫祵鍏ュ紡瀛樺劜鍣�銆�
鍨嬭櫉锛歑C7S50-1FGGA484C
銆�銆�灏佽褰㈠紡锛欶GGA484
銆�銆�I/O 鏁�(sh霉)閲忥細306
銆�銆�閰嶇疆闁冨瓨锛氫笉闆嗘垚
銆�銆�鏈�澶ф煡鎵捐〃锛圠UT锛夋暩(sh霉)閲忥細29,952
銆�銆�鏈�澶у瘎瀛樺櫒鏁�(sh霉)閲忥細58,800
銆�銆�DSP Slice 鏁�(sh霉)閲忥細90
銆�銆�鍏�(n猫i)閮� Block RAM 瀹归噺锛�1,116KB
銆�銆�鍏�(n猫i)閮� FIFO 瀹归噺锛氱劇
銆�銆�鏀寔鐨勬渶楂樺伐浣滈牷鐜囷細550MHz
銆�銆�渚涢浕闆诲鑼冨湇锛�1.0V 鏍稿績闆诲 / 1.8V I/O 闆诲
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�鍏稿瀷鍔熻�楋細1W
1. XC7S50-1FGGA484C 浣跨敤 TSMC 28nm 鍒剁▼鎶�琛撳埗閫�锛岀⒑淇濅簡妤甸珮鐨勬�ц兘鑸囪兘鏁堟瘮銆�
銆�銆�2. 鍏�(n猫i)缃睈瀵岀殑閭忚集璩囨簮锛屽寘鎷� 29,952 鍊� LUT 鍜� 58,800 鍊嬪瘎瀛樺櫒锛岄仼鍚堜腑绛夎(gu墨)妯＄殑瑷▓闇�姹�銆�
銆�銆�3. 閰嶅倷 90 鍊� DSP Slice锛屾敮鎸侀珮绮惧害娴粸閬嬬畻鍜屽京闆滄暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�4. 鎻愪緵澶氶仈 306 鍊嬬敤鎴跺彲鐢ㄧ殑 I/O 寮曡叧锛屾敮鎸佸绋婧栨帴鍙ｅ崝(xi茅)璀�锛屼緥濡� PCIe銆乁SB銆佷互澶恫(w菐ng)绛�銆�
銆�銆�5. 鍏�(n猫i)閮ㄩ泦鎴愪簡 1,116KB 鐨� Block RAM锛岀偤鏁�(sh霉)鎿�(j霉)绶╁瓨鍜岃嚚鏅傚瓨鍎叉彁渚涗簡鍏呰冻鐨勮硣婧�銆�
銆�銆�6. 鏀寔 Vivado 瑷▓宸ュ叿閺堬紝鏂逛究鐢ㄦ埗閫茶楂樺堡娆＄稖鍚堝拰蹇�熷師鍨嬮璀�銆�
銆�銆�7. 绗﹀悎 RoHS 妯欐簴锛岀挵(hu谩n)淇濅笖瀹夊叏鍙潬銆�
XC7S50-1FGGA484C 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊绯荤当(t菕ng)锛氬熀甯惰檿鐞�銆佷俊铏熻(di脿o)鍒惰В瑾�(di脿o)銆佹暩(sh霉)鎿�(j霉)鍖呰檿鐞�銆�
銆�銆�2. 宸ユキ(y猫)鑷嫊鍖栵細瀵︽檪鎺у埗銆侀亱鍕曟帶鍒�銆佸湒鍍忚檿鐞�銆�
銆�銆�3. 閱�(y墨)鐧傝ō鍌欙細瓒呰伈娉㈡垚鍍�銆佹暩(sh霉)鎿�(j霉)閲囬泦鑸囧垎鏋�銆�
銆�銆�4. 娓│娓噺锛氱ず娉㈠櫒銆侀牷璀滃垎鏋愬剙銆佷换鎰忔尝褰㈢櫦(f膩)鐢熷櫒銆�
銆�銆�5. 宓屽叆寮忚▓绠楋細缍�(w菐ng)绲″姞閫熷崱銆佹暩(sh霉)鎿�(j霉)鍔犲瘑妯″銆�
銆�銆�6. 鑸┖鑸ぉ锛氳(w猫i)鏄熼�氫俊銆侀浄閬斾俊铏熻檿鐞嗐��
銆�銆�姝よ姱鐗囨啈鍊熷叾寮峰ぇ鐨勫姛鑳藉拰闈堟椿鎬�锛屾垚鐐虹溇澶氶珮鎬ц兘鎳夌敤鐨勭悊鎯抽伕鎿�銆�
XC7S25-1FGGA484C
銆�銆�XC7S50T-1FGGA484C
