XC7K70T-2FBG676I 鏅傞枔锛�2023/7/18 18:19:48 闁辫畝锛�910

鎻忚堪

銆€銆€XC7K70T-2FBG676I绯诲垪FPGA鍖呮嫭涓夊€嬪叏鏂扮殑FPGA绯诲垪锛屽熀浜庢渶鍏堥€茬殑銆侀珮鎬ц兘銆佷綆鍔熻€�(HPL)銆�28nm銆侀珮k閲戝爆闁€(HKMG)宸ヨ棟鎶€琛�(sh霉)锛屼互2.9Tb/s鐨処/O甯跺銆�200钀€嬮倧杓柈鍏冨閲忓拰5.3TMAC/sDSP锛屽悓鏅傚姛鑰楁瘮涓婁竴浠ｈō(sh猫)鍌欎綆50%锛岀偤ASSP鍜孉SIC鎻愪緵瀹屽叏鍙法绋嬬殑鏇夸唬鏂规銆俋C7K70T-2FBG676I鍙豢瓒冲緸浣庢垚鏈�銆佸皬灏哄銆佹垚鏈晱鎰�銆佸ぇ鎵归噺鎳夌敤鍒拌秴楂樼閫ｆ帴甯跺銆侀倧杓閲忓拰淇¤櫉铏曠悊鑳藉姏鐨勫畬鏁寸郴绲�(t菕ng)瑕佹眰鐢ㄤ簬鏈€鑻涘埢鐨勯珮鎬ц兘鎳夌敤銆�

鐢�(ch菐n)鍝佹杩�

鐢�(ch菐n)鍝佸瀷铏�	XC7K70T-2FBG676I
鎻忚堪	闆嗘垚闆昏矾FPGA 300 I / O 676FCBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)
鍒堕€犲晢	Xilinx鍏徃
绯诲垪	Kintex?-7
鎵撳寘	鎵樼洡
闆诲-闆绘簮	0.97V?1.03V
宸ヤ綔婧害	-40掳C?100掳C(TJ)
鍖呰/绠�	676-BBGA锛孎(xi脿n)CBGA
渚涙噳鍟嗚ō(sh猫)鍌欏寘瑁�	676-FCBGA(27x27)
鍩烘湰闆朵欢铏�	XC7K70T

鐢�(ch菐n)鍝佸湒鐗�

XC7K70T-2FBG676I

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍒堕€犲晢鍖呰瑾槑	FBGA-676
绗﹀悎REACH	鏄�
绗﹀悎姝愮洘RoHS	鏄�
鐙€鎱�(t脿i)	娲绘€�
鍙法绋嬮倧杓鍨�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
鏈€澶ф檪閻橀牷鐜�	1286.0鍏嗚但
CLB-Max鐨勭祫鍚堝欢閬�	0.61绱嶇
JESD-30浠ｇ⒓	S-PBGA-B676
JESD-609浠ｇ⒓	e1
绺絉AM浣�	4976640
CLB鏁�(sh霉)閲�	5125.0
杓稿叆鏁�(sh霉)閲�	300.0
閭忚集鍠厓鏁�(sh霉)	65600.0
杓稿嚭鏁�(sh霉)閲�	300.0
绔瓙鏁�(sh霉)	676
绲勭箶	5125 CLBS
鍖呰涓婚珨鏉愭枡	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰浠ｇ⒓	BGA
鍖呰绛夋晥浠ｇ⒓	BGA676,26X26,40
鍖呰褰㈢媭	鍥涙柟褰�
鍖呰褰㈠紡	缍�(w菐ng)鏍奸櫍鍒�
闆绘簮	1,1.8,3.3
搴ч珮	2.54姣背
瀛愰鍒�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
闆绘簮闆诲妯欑ū	1.0浼�
鏈€灏忎緵闆婚浕澹�	0.97浼�
鏈€澶ч浕婧愰浕澹�	1.03浼�
瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
绲傜瀹屾垚	閷�/閵€/閵�(Sn96.5Ag3.0Cu0.5)
绲傜琛ㄦ牸	鐞�
绔瓙闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
闀峰害	27.0姣背
瀵害	27.0姣背

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

灞€�	鎻忚堪
REACH鐙€鎱�(t脿i)	REACH涓嶅彈褰遍熆
RoHS鐙€鎱�(t脿i)	绗﹀悎ROHS3
姘村垎鏁忔劅鎬ф按骞�(MSL)	4(72灏忔檪)

鐗归粸

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CAD妯″瀷

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XC7K70T-2FBG676I绗﹁櫉

XC7K70T-2FBG676I鑵冲嵃

灏佽

XC7K70T-2FBG676I灏佽

鏇夸唬鍨嬭櫉

鍨嬭櫉	鍒堕€犲晢	鍝佸悕	鎻忚堪
XC7K70T-1FBG676C	璩介潏鎬�	FPGA鑺墖	200I/O 625MHz 65600鍠厓 970mV鑷�1.03V FCBGA-676
XC7K70T-1FBG676I	璩介潏鎬�	FPGA鑺墖	200I/O 625MHz 65600鍠厓 970mV鑷�1.03V FCBGA-676
XC7K70T-3FBG676E	璩介潏鎬�	FPGA鑺墖	741MHz 65600鍠厓 970mV鑷�1.03V FCBGA-676