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鎻忚堪

鐢�(ch菐n)鍝佸瀷铏�	XC7K410T-1FF900I
鎻忚堪	IC FPGA 500 I/O 900FCBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)
鐢熺敘(ch菐n)寤犲	Xilinx鍏徃
绯诲垪	Kintex?-7
閮ㄥ垎鐙€鎱�(t脿i)	娲绘€�
闆诲-闆绘簮	0.97V~1.03V
宸ヤ綔婧害	-40掳C~100掳C(TJ)
鍖�/绠�	900-BBGA锛孎(xi脿n)CBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘	900-FCBGA(31x31)
鍩虹(ch菙)閮ㄤ欢铏�	XC7K410T

鐢�(ch菐n)鍝佸湒鐗�

XC7K410T-1FF900I

瑕�(gu墨)鏍煎弮鏁�(sh霉)

鍙法绋嬮倧杓鍨�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
绗﹀悎REACH妯欐簴	鏄�
鐙€鎱�(t脿i)	娲绘€�
鏅傞悩闋荤巼-鏈€澶у€�	1818.0 MHz
JESD-30浠ｇ⒓	S-PBGA-B900
绺絉AM浣嶆暩(sh霉)	29306880
杓稿叆鏁�(sh霉)閲�	500.0
閭忚集鍠厓鐨勬暩(sh霉)閲�	406720.0
杓稿嚭鏁�(sh霉)閲�	500.0
绲傜鏁�(sh霉)閲�	900
鍖呰楂旀潗鏂�	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰９浠ｇ⒓	BGA
鍖呯瓑鍍逛唬纰�	BGA900,30X30,40
鍖呰褰㈢媭	寤ｅ牬
鍖呰棰ㄦ牸	缍�(w菐ng)鏍奸櫍鍒�
闆绘簮	1,1.8,3.3
璩囨牸鐙€鎱�(t脿i)	涓嶅悎鏍�
瀛愰鍒�	鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪
瀹夎椤炲瀷	琛ㄩ潰璨艰
鎶€琛�(sh霉)	CMOS
绲傜琛ㄦ牸	鐞�
绲傜闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴

鐠�(hu谩n)澧冭垏鍑哄彛鍒嗛

鐒￠墰鐙€鎱�(t脿i)/RoHS鐙€鎱�(t脿i)	鍖呭惈閴�/ RoHS涓嶅悎瑕�(gu墨)
婵曞害鏁忔劅搴︾瓑绱�(MSL)	4(72灏忔檪)

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楂樻€ц兘SelectIO?鎶€琛�(sh霉)锛屾敮鎸侀珮閬�1,866 Mb / s鐨凞DR3鎺ュ彛銆�
PCIExpress?(PCIe)闆嗘垚妯″锛屾渶澶氬彲鏀寔x8 Gen3绔粸鍜屾牴绔彛瑷�(sh猫)瑷堛€�
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