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XC7K355T-3FFG676C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Kintex-7 绯诲垪 FPGA 鑺墖涓殑涓�娆�銆傝┎绯诲垪鑺墖灏堢偤楂樻�ц兘銆佷綆鍔熻�楃殑鎳夌敤鍫存櫙瑷▓锛屽唬娉涙噳鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)鎺у埗銆侀啱(y墨)鐧傛垚鍍忓拰寤ｆ挱瑕栭牷绛夐牁鍩�銆�
銆�銆�Kintex-7 绯诲垪閲囩敤浜� 28nm 宸ヨ棟鍒堕�狅紝鍏峰倷璞愬瘜鐨� DSP Slice 鍜� Block RAM 璩囨簮锛屾敮鎸侀珮閫熶覆琛屾敹鐧�(f膩)鍣紙GTX/GTH锛夛紝鑳藉婊胯冻澶氱ó寰╅洔淇¤櫉铏曠悊闇�姹�銆俋C7K355T-3FFG676C 鎻愪緵浜嗛珮閬� 35.5 钀�嬮倧杓柈鍏�锛屽叿鏈夊嚭鑹茬殑鎬ц兘鑸囬潏娲绘�с��
鍨嬭櫉锛歑C7K355T-3FFG676C
銆�銆�宸ヨ棟锛�28nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細355,000
銆�銆�DSP Slice 鏁�(sh霉)閲忥細2,160
銆�銆�Block RAM 鏁�(sh霉)閲忥細绱� 3,990 Kb
銆�銆�閰嶇疆妯″紡锛歋electMAP 鎴� JTAG
銆�銆�I/O 閵�琛屾暩(sh霉)閲忥細54
銆�銆�灏佽褰㈠紡锛欶FG676
銆�銆�宸ヤ綔婧害鑼冨湇锛氬晢妤�(y猫)绱氾紙0掳C 鑷� 100掳C锛�
銆�銆�渚涢浕闆诲锛�1.0V 鏍稿績闆诲 / 1.8V 杓斿姪闆诲
XC7K355T-3FFG676C 鎿佹湁浠ヤ笅椤憲鐗规�э細
銆�銆�1. 楂樻�ц兘鏋舵锛氶噰鐢� UltraScale 鏋舵鐨勫墠韬�锛屾彁渚涢珮鍚炲悙閲忓拰浣庡欢閬层��
銆�銆�2. 鍏х疆楂橀�熸敹鐧�(f膩)鍣細鏀寔楂橀仈 6.6 Gbps 鐨� GTX 鏀剁櫦(f膩)鍣�锛岄仼鐢ㄤ簬鍏夌簴閫氫俊绛夋噳鐢ㄣ��
銆�銆�3. 璞愬瘜瀛樺劜璩囨簮锛氬寘鍚ぇ瀹归噺 Block RAM 鍜屽垎甯冨紡 RAM锛岄仼鍚堟暩(sh霉)鎿氱珐瀛樺拰 FIFO 瀵︾従(xi脿n)銆�
銆�銆�4. 寮峰ぇ鐨� DSP 鍔熻兘锛氭瘡鍊� DSP Slice 鍖呭惈 27x18 涔樻硶鍣ㄥ拰 48-bit 绱姞鍣�锛岄仼鍚堟暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕欍��
銆�銆�5. 浣庡姛鑰楀劒(y艒u)鍖栵細閫氶亷鍕曟厠(t脿i)闆绘簮绠＄悊鎶�琛撴笡灏戜笉蹇呰鐨勮兘閲忔秷鑰�銆�
銆�銆�6. 澶氱ó鏅傞悩绠＄悊閬搁爡锛氬収缃� PLL 鍜� MMCM锛屾彁渚涢潏娲荤殑鏅傞悩鍒嗛牷鍜屽�嶉牷鍔熻兘銆�
銆�銆�7. 寤ｆ硾鎺ュ彛鏀寔锛氬寘鎷� PCIe銆佸崈鍏嗕互澶恫銆丼DIO 绛夊绋崝(xi茅)璀版帴鍙�銆�
銆�銆�8. 楂樺彲闈犳�э細鏀寔 ECC 鍏у瓨鏍￠鍜屾晠闅滄娓鍒�锛屼繚闅滅郴绲�(t菕ng)绌�(w臎n)瀹氭��銆�
XC7K355T-3FFG676C 涓昏鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊鍩虹瑷柦锛氬鐒＄窔鍩虹珯銆佽矾鐢卞櫒銆佷氦鎻涙绛夈��
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銆�銆�7. 姹借粖闆诲瓙锛氶珮绱氶椐涜紨鍔╃郴绲�(t菕ng)锛圓DAS锛変互鍙婁俊鎭妯傜郴绲�(t菕ng)鐨勯枊鐧�(f膩)銆�
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銆�銆�XC7K410T-3FFG676C
銆�銆�XC7K355T-2FFG676C
