鏅傞枔锛�2023/7/18 18:44:37
闁辫畝锛�706
鐢㈠搧鍨嬭櫉 | XC7K355T-2FFG901I |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 300 I / O 901FCBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝惧牬鍙法绋嬮杸闄ｅ垪) |
鍒堕�犲晢 | Xilinx鍏徃 |
绯诲垪 | Kintex?-7 |
鎵撳寘 | 鎵樼洡 |
闆朵欢鐙�鎱�(t脿i) | 娲绘�� |
闆诲-闆绘簮 | 0.97V?1.03V |
宸ヤ綔婧害 | -40掳C?100掳C(TJ) |
鍖呰/绠� | 900-BBGA锛孎CBGA |
渚涙噳鍟嗚ō鍌欏寘瑁� | 901-FCBGA(31x31) |
鍩烘湰闆朵欢铏� | XC7K355T |
XC7K355T-2FFG901I
鍒堕�犲晢鍖呰瑾槑 | FBGA-900 |
绗﹀悎REACH | 鏄� |
绗﹀悎姝愮洘RoHS | 鏄� |
鐙�鎱�(t脿i) | 娲绘�� |
鍙法绋嬮倧杓鍨� | 鐝惧牬鍙法绋嬮杸闄ｅ垪 |
鏈�澶ф檪閻橀牷鐜� | 1286.0鍏嗚但 |
CLB-Max鐨勭祫鍚堝欢閬� | 0.61绱嶇 |
JESD-30浠ｇ⒓ | S-PBGA-B901 |
JESD-609浠ｇ⒓ | e1 |
绺絉AM浣� | 26357760 |
CLB鏁搁噺 | 27825.0 |
杓稿叆鏁搁噺 | 300.0 |
閭忚集鍠厓鏁� | 356160.0 |
杓稿嚭鏁搁噺 | 300.0 |
绔瓙鏁� | 901 |
闆绘簮 | 1,1.8,3.3 |
闆绘簮闆诲妯欑ū | 1.0浼� |
鏈�灏忎緵闆婚浕澹� | 0.97浼� |
鏈�澶ч浕婧愰浕澹� | 1.03浼� |
鍖呰涓婚珨鏉愭枡 | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰浠ｇ⒓ | BGA |
鍖呰绛夋晥浠ｇ⒓ | BGA900,30X30,40 |
鍖呰褰㈢媭 | 鍥涙柟褰� |
鍖呰褰㈠紡 | 缍叉牸闄ｅ垪 |
搴ч珮 | 3.35姣背 |
瀛愰鍒� | 鐝惧牬鍙法绋嬮杸闄ｅ垪 |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛� | CMOS |
绲傜瀹屾垚 | 閷�/閵�/閵�(Sn / Ag / Cu) |
绲傜琛ㄦ牸 | 鐞� |
绔瓙闁撹窛 | 1.0姣背 |
绲傜浣嶇疆 | 搴曢儴 |
闀峰害 | 31.0姣背 |
瀵害 | 31.0姣背 |
RoHS鐙�鎱�(t脿i) | 绗﹀悎ROHS3 |
姘村垎鏁忔劅鎬ф按骞�(MSL) | 4(72灏忔檪) |
楂樻�ц兘SelectIO?鎶�琛擄紝鏀寔楂橀仈1866 Mb / s鐨凞DR3鎺ュ彛銆�
鍏锋湁鍏х疆FIFO閭忚集鐨�36 Kb闆欑鍙lock RAM锛岀敤浜庣墖涓婃暩鎿氱珐娌�銆�
鐢ㄤ簬PCIExpress?(PCIe)鐨勯泦鎴愭ā濉�锛屾渶澶氬彲鐢ㄤ簬x8 Gen3绔粸鍜屾牴绔彛瑷▓銆�
鍩轰簬鍙厤缃偤鍒嗗竷寮忓瓨鍎插櫒鐨勭湡瀵�6杓稿叆鏌ユ壘琛�(LUT)鎶�琛撶殑楂樼礆楂樻�ц兘FPGA閭忚集銆�
鐢ㄦ埗鍙厤缃殑妯℃摤鎺ュ彛(XADC)锛屽皣闆�12浣�1MSPS妯℃暩杞夋彌鍣ㄨ垏鐗囦笂婧害鍌虫劅鍣ㄥ拰闆绘簮鍌虫劅鍣ㄧ祼鍚堝湪涓�璧枫��
鍏锋湁25 x 18涔樻硶鍣�锛�48浣嶇疮鍔犲櫒鍜岄爯鍔犲櫒鐨凞SP slice锛岀敤浜庨珮鎬ц兘婵炬尝锛屽寘鎷劒(y艒u)鍖栫殑灏嶇ū绯绘暩婵炬尝銆�
寮峰ぇ鐨勬檪閻樼鐞嗗(CMT)锛岀祼鍚堜簡閹栫浉鐠�(hu谩n)(PLL)鍜屾贩鍚堟ā寮忔檪閻樼鐞嗗櫒(MMCM)妯″锛屽彲瀵︾従楂樼簿搴﹀拰浣庢姈鍕�銆�
澶氱ó閰嶇疆閬搁爡锛屽寘鎷皪鍟嗗搧瀛樺劜鍣ㄧ殑鏀寔锛屽叿鏈塇MAC / SHA-256韬唤椹楄瓑鐨�256浣岮ES鍔犲瘑浠ュ強鍏х疆鐨凷EU妾㈡脯鍜屾牎姝�銆�
灏堢偤楂樻�ц兘鍜屾渶浣庡姛鑰楄�岃ō瑷�锛屽叿鏈�28 nm锛孒KMG锛孒PL宸ヨ棟锛�1.0V鏍稿績闆诲铏曠悊鎶�琛撳拰0.9V鏍稿績闆诲閬镐欢锛屼互瀵︾従鏇翠綆鐨勫姛鑰�銆�
鍏х疆鐨勫鍗冨厗浣嶆敹鐧�(f膩)鍣ㄧ殑楂橀�熶覆琛岄�ｆ帴寰�600 Mb / s鍒版渶澶ч�熺巼6.6 Gb / s锛屾渶楂樺彲閬�28.05 Gb / s锛屾彁渚涗簡閲濆皪鑺墖闁撴帴鍙ｉ�茶浜嗗劒(y艒u)鍖栫殑鐗规畩浣庡姛鑰楁ā寮�銆�
浣庢垚鏈�锛屽紩绶氶嵉鍚�锛岀劇钃嬪�掕鑺墖鍜岄珮淇¤櫉瀹屾暣鎬у�掕鑺墖灏佽锛屽彲杓曟澗瀵︾従鍚屼竴灏佽涓郴鍒楁垚鍝′箣闁撶殑閬风Щ銆傛墍鏈夎粺浠跺寘鍧囩劇閴�锛岃�岄伕瀹氱殑杌熶欢鍖呯偤Pb閬搁爡銆�
XC7K355T-2FFG901I绗﹁櫉
XC7K355T-2FFG901I鑵冲嵃
