鏅傞枔锛�2025/5/9 15:28:36
闁辫畝锛�34
XC7K325T-FFFG900I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Kintex-7 绯诲垪 FPGA 鑺墖锛屽爆浜庨珮鎬ц兘 FPGA 瀹舵棌鐨勪竴鍝�銆傝┎鑺墖閬╃敤浜庨珮閫熶俊铏熻檿鐞嗐�侀�氫俊绯荤当(t菕ng)銆佽闋诲拰鍦栧儚铏曠悊銆侀啱(y墨)鐧傛垚鍍忎互鍙婃脯瑭︽脯閲忕瓑闋樺煙銆�
銆�銆�閫欐 FPGA 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮銆佹暩(sh霉)瀛椾俊铏熻檿鐞� (DSP) 妯″銆佸瓨鍎插櫒璩囨簮浠ュ強楂橀�熶覆琛屾敹鐧�(f膩)鍣�锛岃兘澶犳豢瓒冲京闆滅郴绲�(t菕ng)瑷▓鐨勯渶姹�銆�
鍨嬭櫉锛歑C7K325T
銆�銆�灏佽锛欶FG900
銆�銆�I/O 鏁�(sh霉)閲忥細684
銆�銆�閰嶇疆闁冨瓨锛氱劇鍏�(n猫i)缃杻瀛�
銆�銆�鐢ㄦ埗鍙敤閭忚集鍠厓锛�325,200
銆�銆�DSP Slice 鏁�(sh霉)閲忥細840
銆�銆�Block RAM锛�12.7Mb
銆�銆�鍏�(n猫i)閮� Flash锛氱劇
銆�銆�鏈�澶у伐浣滈牷鐜囷細绱� 600 MHz
銆�銆�渚涢浕闆诲锛�1.0V 鏍稿績闆诲 / 1.8V 杓斿姪闆诲
銆�銆�婧害鑼冨湇锛氬伐妤�(y猫)绱氾紙-40掳C 鑷� +100掳C锛�
銆�銆�寮曡叧鏁�(sh霉)锛�900
XC7K325T-FFFG900I 鍩轰簬 28nm 宸ヨ棟鍒堕��锛屽叿鍌欓珮瀵嗗害鍜屼綆鍔熻�楃殑鐗归粸銆傚叾鏍稿績鐗规�у寘鎷細
銆�銆�1. 楂樻�ц兘鏋舵(g貌u)锛氭敮鎸侀珮閬� 600MHz 鐨勬檪閻橀牷鐜�锛岄仼鍚堝皪瀵︽檪鎬ц姹傝純楂樼殑鎳夌敤銆�
銆�銆�2. 闆嗘垚鐨勯珮閫熸敹鐧�(f膩)鍣細鎻愪緵澶氶仈 8 鍊� GTX 鏀剁櫦(f膩)鍣ㄩ�氶亾锛屾暩(sh霉)鎿�(j霉)閫熺巼鑼冨湇寰� 600Mbps 鍒� 6.6Gbps锛屾敮鎸� PCIe銆丆PRI 鍜屽叾浠栧崝(xi茅)璀�銆�
銆�銆�3. DSP Slice锛氭瘡鍊� DSP Slice 鍖呭惈灏堢敤鐨勪箻娉曞櫒鍜屽姞娉曞櫒锛屽彲瀵︾従(xi脿n)楂樻晥鐨勫畾榛炲拰娴粸閬嬬畻銆�
銆�銆�4. 瀛樺劜鍣ㄨ硣婧愶細鍖呮嫭澶у閲� Block RAM 鍜屽垎甯冨紡 RAM锛屼究浜庡鐝�(xi脿n)寰╅洔鐨勫瓨鍎叉帶鍒跺拰绠楁硶铏曠悊銆�
銆�銆�5. 鍙摯灞� I/O锛氭敮鎸佸绋婧栨帴鍙�锛屽 LVDS銆丳CIe銆丏DR3 绛�锛屾豢瓒充笉鍚屾噳鐢ㄥ牬鏅渶姹�銆�
銆�銆�6. 鍏�(n猫i)缃檪閻樼鐞嗘ā濉婏細闆嗘垚 PLL 鍜� MMCM锛屾柟渚块�茶鏅傞悩鍚堟垚鑸囧垎闋绘搷浣�銆�
銆�銆�7. 鍔熻�楀劒(y艒u)鍖栵細鏀寔鍕曟厠(t脿i)鍔熻�楄(di脿o)绡�(ji茅)鎶�琛擄紝鍙牴鎿�(j霉)瀵﹂殯璨犺級瑾�(di脿o)鏁磋姱鐗囧姛鑰楁按骞�銆�
XC7K325T-FFFG900I 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 閫氫俊瑷倷锛氬熀绔欐敹鐧�(f膩)淇℃銆佸厜鍌宠几缍�(w菐ng)绲¤ō鍌欑瓑銆�
銆�銆�2. 鏁�(sh霉)鎿�(j霉)涓績锛氱敤浜庡姞閫熸湇鍕欏櫒涓殑瑷堢畻浠诲嫏鎴栫恫(w菐ng)绲℃祦閲忚檿鐞嗐��
銆�銆�3. 瑕栭牷鑸囧湒鍍忚檿鐞嗭細楂樻竻瑕栭牷绶ㄧ⒓瑙ｇ⒓銆佸鏅傚湒鍍忓垎鏋愮瓑銆�
銆�銆�4. 閱�(y墨)鐧傞浕瀛愶細瓒呰伈娉㈡垚鍍忋�丆T 鎺冩弿鍎�绛夐啱(y墨)鐧傚奖鍍忚ō鍌�銆�
銆�銆�5. 宸ユキ(y猫)鑷嫊鍖栵細閬嬪嫊鎺у埗銆佹鍣ㄤ汉瑕栬绛�銆�
銆�銆�6. 娓│娓噺锛氱ず娉㈠櫒銆佷俊铏熺櫦(f膩)鐢熷櫒绛夌簿瀵嗗剙鍣ㄣ��
XC7K410T-FFG900I, XC7K355T-FFG900I
