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| 鍟嗗搧鍒嗛 | FPGA鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 | I/O鏁�(sh霉) | 250 |
| 鍝佺墝 | XILINX(璩介潏鎬�) | 闆诲-渚涢浕 | 0.95V ~ 1.05V |
| 灏佽 | BGA | 瀹夎椤炲瀷 | 琛ㄩ潰璨艰鍨� |
| 鍟嗗搧妯欑敖 | 宸ユキ(y猫)绱� | 宸ヤ綔婧害 | -40掳C ~ 100掳C锛圱J锛� |
| 閭忚集鍏冧欢/鍠厓鏁�(sh霉) | 33280 | 鍩烘湰鐢�(ch菐n)鍝佺法铏� | XC7A35 |
| 绺絉AM浣嶆暩(sh霉) | 1843200 | LAB/CLB鏁�(sh霉) | 2600 |
| RoHS鐙�鎱�(t脿i) | 绗﹀悎 ROHS3 瑕�(gu墨)鑼� | REACH鐙�鎱�(t脿i) | 闈� REACH 鐢�(ch菐n)鍝� |
| 婵曟埃鏁忔劅鎬х瓑绱�(MSL) | 3锛�168 灏忔檪锛� | HTSUS | 8542.39.0001 |
| ECCN | 3A991D |
