XC7A35T-2CS324I 鏅傞枔锛�2025/4/30 20:48:21 闁辫畝锛�31

XC7A35T-2CS324I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Artix-7 绯诲垪 FPGA 鑺墖涓殑涓€鍊嬪瀷铏�銆侫rtix-7 绯诲垪鏄潰鍚戜綆鍔熻€楀拰楂樻€ц兘鎳�(y墨ng)鐢ㄧ殑 FPGA 骞宠嚭锛岄仼鐢ㄤ簬閫氫俊銆佸伐妤�(y猫)銆侀啱(y墨)鐧�銆佽埅绌洪浕瀛愪互鍙婂唬鎾闋荤瓑闋�(l菒ng)鍩熴€俋C7A35T 鎻愪緵璞愬瘜鐨勯倧杓硣婧�銆佹暩(sh霉)瀛椾俊铏熻檿鐞� (DSP) 妯″銆佸瓨鍎插櫒妯″浠ュ強澶氱ó鎺ュ彛閬搁爡(xi脿ng)銆�
銆€銆€瑭茶姱鐗囬噰鐢� 28nm 宸ヨ棟鍒堕€�锛屽叿鏈夎純浣庣殑闈滄厠(t脿i)鍔熻€楀拰杓冮珮鐨勬€ц兘琛ㄧ従(xi脿n)锛岄仼鍚堝皪鍔熻€楁晱鎰熺殑鎳�(y墨ng)鐢ㄥ牬鏅€�

鍙冩暩(sh霉)

鍨嬭櫉锛歑C7A35T-2CS324I
銆€銆€绯诲垪锛欰rtix-7
銆€銆€宸ヨ棟锛�28nm
銆€銆€閰嶇疆妯″紡锛歋lave Serial
銆€銆€灏佽锛欳S324
銆€銆€閫熷害绛夌礆锛�-2
銆€銆€閭忚集鍠厓鏁�(sh霉)閲忥細35,140
銆€銆€DSP Slice 鏁�(sh霉)閲忥細90
銆€銆€Block RAM 瀹归噺锛�1,800 Kb
銆€銆€閰嶇疆 Flash锛氱劇鍏�(n猫i)缃�
銆€銆€I/O Bank 鏁�(sh霉)閲忥細16
銆€銆€渚涢浕闆诲锛�1.0V 鏍稿績锛�1.8V I/O
銆€銆€宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C

鐗规€�

XC7A35T-2CS324I 鍏峰倷浠ヤ笅涓昏鐗规€э細
銆€銆€1. 楂樻晥鐨勯倧杓祼(ji茅)妲�(g貌u)锛欰rtix-7 绯诲垪閲囩敤浜� UltraScale 鏋舵(g貌u)鐨勬棭鏈熺増鏈紝鎻愪緵闈堟椿鐨勯倧杓櫍鍒�锛屾敮鎸佸閬�(d谩) 35K 鐨勯倧杓柈鍏冦€�
銆€銆€2. 鍏�(n猫i)缃� DSP 妯″锛氭瘡鍊� DSP Slice 鍖呭惈 27x18 涔樻硶鍣ㄥ拰 48-bit 绱姞鍣�锛岃兘澶犻珮鏁堝(sh铆)鐝�(xi脿n)寰�(f霉)闆滅殑鏁�(sh霉)瀛�(xu茅)閬�(y霉n)绠楀拰婵炬尝鍔熻兘銆�
銆€銆€3. 澶у閲� Block RAM锛氭敮鎸侀珮閬�(d谩) 1800 Kb 鐨勫垎甯冨紡瀛樺劜鍜屽祵鍏ュ紡瀛樺劜璩囨簮锛屽彲浠ラ厤缃偤 FIFO銆丷AM 鎴� ROM銆�
銆€銆€4. 澶氱ó鏅傞悩绠＄悊閬搁爡(xi脿ng)锛氶泦鎴� PLL 鍜� MMCM锛堝妯℃檪閻樼鐞嗭級妯″锛屾敮鎸佺簿纰虹殑鏅傞悩鍒嗛厤鍜岄牷鐜囧悎鎴�銆�
銆€銆€5. 鏀寔楂橀€熶覆琛屾帴鍙ｏ細闆栫劧 XC7A35T 涓嶅寘鍚‖鏍� GTX 鏀剁櫦(f膩)鍣�锛屼絾鍙互閫氶亷杌熸牳瀵�(sh铆)鐝�(xi脿n)閮ㄥ垎楂橀€熸帴鍙ｅ姛鑳�銆�
銆€銆€6. 鍙法绋� I/O锛氭敮鎸佸绋(bi膩o)婧�(zh菙n)鍗�(xi茅)璀板 PCIe銆乁SB銆丒thernet 绛夛紝閬╅厤鍚勭ó鎳�(y墨ng)鐢ㄥ牬鏅�銆�
銆€銆€7. 浣庡姛鑰楄ō(sh猫)瑷堬細閫氶亷鍕曟厠(t脿i)鍔熻€楀劒(y艒u)鍖栨妧琛�(sh霉)锛屽湪淇濊瓑鎬ц兘鐨勫悓鏅傞’钁楅檷浣庤兘鑰�銆�

鎳�(y墨ng)鐢�

XC7A35T-2CS324I 涓昏鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆€銆€1. 閫氫俊绯荤当(t菕ng)锛氱敤浜庡皬鍨嬪熀绔欍€佸洖鍌宠ō(sh猫)鍌欏強淇¤櫉铏曠悊鍠厓銆�
銆€銆€2. 宸ユキ(y猫)鑷嫊鍖栵細瀵�(sh铆)鐝�(xi脿n)寰�(f霉)闆滅殑鎺у埗绠楁硶銆佹暩(sh霉)鎿�(j霉)閲囬泦鑸囧(sh铆)鏅傜洠(ji膩n)鎺�銆�
銆€銆€3. 閱�(y墨)鐧傛垚鍍忥細鏀寔瓒呰伈娉㈣ō(sh猫)鍌欍€丆T 鎺冩弿鍎€绛夊湒鍍忚檿鐞嗕换鍕�(w霉)銆�
銆€銆€4. 瑕栭牷鑸囧唬鎾細鎻愪緵瑕栭牷绶ㄨВ纰�銆佸湒鍍忓寮�(qi谩ng)绛夊姛鑳姐€�
銆€銆€5. 宓屽叆寮忚瑕猴細鐢ㄤ綔瑷堢畻姗�(j墨)瑕栬绯荤当(t菕ng)鐨勫墠绔檿鐞嗗櫒鎴栧崝(xi茅)铏曠悊鍣�銆�
銆€銆€6. 娓│鑸囨脯閲忥細妲�(g貌u)寤洪珮鎬ц兘娓│鍎€鍣紝渚嬪绀烘尝鍣�銆佷俊铏熺櫦(f膩)鐢熷櫒绛夈€�
銆€銆€7. 鑸┖鑸ぉ鑸囧湅闃诧細閬╃敤浜庨渶瑕侀珮鍙潬鎬т笖浣庡姛鑰楃殑琛�(w猫i)鏄熼€氫俊銆侀浄閬�(d谩)鎺㈡脯绛夌郴绲�(t菕ng)銆�