闆欑鍙AM妯″
鎻愰珮浜嗚矾鐢辨晥鐜�
鎻愪緵2500Mb / s鏀寔
36-Kb濉奟AM / FIFO
40 nm閵匔MOS宸ヨ棟鎶�琛�(sh霉)
LXT鍜孲XT鍣ㄤ欢鍦ㄥ悓涓�灏佽涓吋瀹�
鍏堥��(j矛n)鐨勯珮鎬ц兘FPGA閭忚集
鐪熸鐨�6杓稿叆鏌ユ壘琛�(LUT)鎶�琛�(sh霉)
闆橪UT5(5杓稿叆LUT)閬搁爡(xi脿ng)
姣�6杓稿叆LUT鏈�64浣�(鎴栧叐鍊�(g猫)32浣�)鍒嗗竷寮廘UT RAM閬搁爡(xi脿ng)
SRL32 /闆橲RL16锛屽付娉ㄥ唺(c猫)杓稿嚭閬搁爡(xi脿ng)
寮�(qi谩ng)澶х殑娣峰悎妯″紡鏅�(sh铆)閻樼鐞嗗櫒(MMCM)
鍙法绋嬬殑
闆欑鍙ｅ搴﹂珮閬�(d谩)36浣�
绨�(ji菐n)鍠殑闆欑鍙ｅ搴﹂珮閬�(d谩)72浣�
澧炲挤(qi谩ng)鐨勫彲绶ㄧ▼FIFO閭忚集
鍏�(n猫i)缃彲閬哥殑绯鹃尟(cu貌)闆昏矾
鍙伕鎿囧皣姣忓��(g猫)濉婄敤浣滃叐鍊�(g猫)鐛�(d煤)绔嬬殑18 Kb濉�
楂樻�ц兘骞惰SelectIO?鎶�琛�(sh霉)
1.2鑷�2.5VI / O鎿嶄綔
浣跨敤ChipSync?鎶�琛�(sh霉)閫�(j矛n)琛屾簮鍚屾鎺ュ彛
鏁�(sh霉)瀛楁帶鍒堕樆鎶�(DCI)鏈夋簮绲傜
闈堟椿鐨勭窗(x矛)绮掑害I / O閵�琛屾キ(y猫)鍕�(w霉)
鏀寔楂橀�熷瓨鍎�(ch菙)鍣ㄦ帴鍙ｏ紝鍏锋湁闆嗘垚鐨勫(xi臎)鍏ュ潎琛″姛鑳�
鍏堥��(j矛n)鐨凞SP48E1鍒囩墖
25 x 18锛屼簩閫�(j矛n)鍒惰(b菙)纰间箻娉曞櫒/绱姞鍣�
鍙伕鐨勬祦姘寸窔
鏂扮殑鍙伕闋�(y霉)鍔犳硶鍣�锛屽彲鍗�(xi茅)鍔╅亷(gu貌)婵炬噳(y墨ng)鐢ㄧ▼搴�
鍙伕鐨勬寜浣嶉倧杓姛鑳�
灏堢敤绱�(j铆)鑱�(li谩n)閫ｆ帴
闈堟椿鐨勯厤缃伕闋�(xi脿ng)
SPI鍜屽苟琛孎lash鎺ュ彛
鍏锋湁灏堢敤鍥為��閲嶉厤缃倧杓殑澶氭瘮鐗规祦鏀寔
鑷嫊(d貌ng)绺界窔瀵害妾㈡脯(c猫)
鎵�鏈夎ō(sh猫)鍌欎笂鐨勭郴绲�(t菕ng)鐩�(ji膩n)瑕栧櫒鍔熻兘
鐗囦笂/鐗囧鐔遍噺鍜岄浕婧愰浕澹撶洠(ji膩n)鎺�
JTAG瑷晱(w猫n)鎵�鏈夊彈鐩�(ji膩n)鎺х殑鏁�(sh霉)閲�
鐢ㄤ簬PCIExpress?瑷�(sh猫)瑷�(j矛)鐨勯泦鎴愭帴鍙ｆā濉�
绗﹀悎PCI Express Base Specification 2.0
Gen1(2.5 Gb / s)鍜孏en2(5 Gb / s)鏀寔GTX鏀剁櫦(f膩)鍣�
绔粸(di菐n)鍜屾牴绔彛鑳藉
姣忓��(g猫)濉妜1锛寈2锛寈4鎴杧8閫氶亾鏀寔
GTX鏀剁櫦(f膩)鍣細楂橀仈(d谩)6.6 Gb / s
FPGA閭忚集涓殑閬�(gu貌)閲囨ǎ鏀寔浣庝簬480 Mb / s鐨勬暩(sh霉)鎿�(j霉)閫熺巼銆�
GTH鏀剁櫦(f膩)鍣細2.488 Gb / s鑷宠秴閬�(gu貌)11 Gb / s
闆嗘垚鐨�10/100/1000 Mb / s浠ュお缍�(w菐ng)MAC濉�
浣跨敤GTX鏀剁櫦(f膩)鍣ㄦ敮鎸�1000BASE-X PCS / PMA鍜孲GMII
浣跨敤SelectIO鎶�琛�(sh霉)璩囨簮鏀寔MII锛孏MII鍜孯GMII
1.0V鏍稿績闆诲(鍍呴檺-1锛�-2锛�-3閫熷害绛夌礆(j铆))
浣庡姛鑰�0.9V鏍稿績闆诲閬搁爡(xi脿ng)(鍍呴檺-1L閫熷害绛夌礆(j铆))
LUT /闆欒Ц鐧�(f膩)鍣ㄥ皪(du矛)鐢ㄤ簬闇�瑕佽睈瀵屽瘎瀛樺櫒娣峰悎鐨勬噳(y墨ng)鐢�
Virtex-6 LXT FPGA锛氬叿鏈夐珮绱�(j铆)涓茶閫ｆ帴鐨勯珮鎬ц兘閭忚集
楂樹俊铏�(h脿o)瀹屾暣鎬у�掕鑺墖灏佽锛屾彁渚涙(bi膩o)婧�(zh菙n)鎴栫劇(w煤)閴涘皝瑁濋伕闋�(xi脿ng)
MMCM妯″鎻愪緵闆跺欢閬茬珐娌�锛岄牷鐜囧悎鎴�锛屾檪(sh铆)閻樼浉绉�锛岃几鍏ユ姈鍕�(d貌ng)婵炬尝鍜岀浉浣嶅尮閰嶆檪(sh铆)閻樺垎闋�
鏅�(sh铆)闁擄細2022/10/20 10:12:22
闁辫畝锛�449
