鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng)
鐧婚寗 | 鍏嶈不(f猫i)娉ㄥ唺
鏅傞枔锛�2023/8/4 17:44:57
闁辫畝锛�574
鐢�(ch菐n)鍝佸瀷铏� | XC6VLX130T-1FF1156I |
鎻忚堪 | IC FPGA 600 I/O 1156FCBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鐢熺敘(ch菐n)寤犲 | Xilinx鍏徃 |
绯诲垪 | Virtex?-6 LXT |
閮ㄥ垎鐙�鎱�(t脿i) | 娲绘�� |
闆诲-闆绘簮 | 0.95V~1.05V |
宸ヤ綔婧害 | -40掳C~100掳C(TJ) |
鍖�/绠� | 1156-BBGA锛孎(xi脿n)CBGA |
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘 | 1156-FCBGA(35x35) |
鍩虹(ch菙)閮ㄤ欢铏� | XC6VLX130T |
XC6VLX130T-1FF1156I
鍙法绋嬮倧杓鍨� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
绗﹀悎REACH妯�(bi膩o)婧�(zh菙n) | 鏄� |
鐙�鎱�(t脿i) | 娲绘�� |
鏅傞悩闋荤巼-鏈�澶у�� | 1098.0 MHz |
CLB-Max鐨勭祫鍚堝欢閬� | 5.08 ns |
JESD-30浠ｇ⒓ | S-PBGA-B1156 |
JESD-609浠ｇ⒓ | E0 |
绺絉AM浣嶆暩(sh霉) | 9732096 |
杓稿叆鏁�(sh霉)閲� | 600.0 |
閭忚集鍠厓鐨勬暩(sh霉)閲� | 128000.0 |
杓稿嚭鏁�(sh霉)閲� | 600.0 |
绲傜鏁�(sh霉)閲� | 1156 |
宸ヤ綔婧害-鏈�灏忓�� | -40鈩� |
宸ヤ綔婧害-鏈�楂� | 100鈩� |
宄板�煎洖娴佹韩搴�(鈩�) | 鏈(bi膩o)鏄� |
闆绘簮 | 1,1.2 / 2.5 |
璩囨牸鐙�鎱�(t脿i) | 涓嶅悎鏍� |
鍧愬Э楂樺害-鏈�澶� | 3.5姣背 |
瀛愰鍒� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
闆绘簮闆诲 | 1.0 V |
闆绘簮闆诲-鏈�灏忓�� | 0.95 V |
闆绘簮闆诲-鏈�澶у�� | 1.05 V |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛�(sh霉) | CMOS |
婧害绛夌礆 | 鐢�(ch菐n)妤�(y猫) |
绲傜瀹屾垚 | 閷�/閴�(Sn63Pb37) |
绲傜琛ㄦ牸 | 鐞� |
绲傜闁撹窛 | 搴曢儴 |
鏅傞枔@宄板�煎洖娴佹韩搴�-鏈�澶у�� | 鏈(bi膩o)鏄� |
闀峰害 | 35.0姣背 |
瀵害 | 35.0姣背 |
鍖呰楂旀潗鏂� | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰９浠ｇ⒓ | BGA |
鍖呯瓑鍍逛唬纰� | BGA1156,34X34,40 |
鍖呰褰㈢媭 | 寤ｅ牬 |
鍖呰棰�(f膿ng)鏍� | 缍�(w菐ng)鏍奸櫍鍒� |
鍒堕�犲晢鍖呰瑾槑 | FBGA-1156 |
鐒￠墰鐙�鎱�(t脿i)/RoHS鐙�鎱�(t脿i) | 鐒￠墰/绗﹀悎RoHS妯�(bi膩o)婧�(zh菙n) |
婵曞害鏁忔劅搴︾瓑绱�(MSL) | 4(72灏忔檪) |
?Virtex-6 LXT FPGA锛氬叿鏈夐珮绱氫覆琛岄�ｆ帴鐨勯珮鎬ц兘閭忚集
?LXT鍜孲XT鍣ㄤ欢鍦ㄥ悓涓�灏佽涓吋瀹�
?鍏堥��(j矛n)鐨勯珮鎬ц兘FPGA閭忚集
?鐪熸鐨�6杓稿叆鏌ユ壘琛�(LUT)鎶�琛�(sh霉)
?闆橪UT5(5杓稿叆LUT)閬搁爡(xi脿ng)
?LUT /闆欒Ц鐧�(f膩)鍣ㄥ皪鐢ㄤ簬闇�瑕佽睈瀵屽瘎瀛樺櫒娣峰悎鐨勬噳(y墨ng)鐢�
?鎻愰珮浜嗚矾鐢辨晥鐜�
?姣�6杓稿叆LUT鏈�64浣�(鎴栧叐鍊�32浣�)鍒嗗竷寮廘UT RAM閬搁爡(xi脿ng)
?SRL32 /闆橲RL16锛屽付娉ㄥ唺杓稿嚭閬搁爡(xi脿ng)
?寮�(qi谩ng)澶х殑娣峰悎妯″紡鏅傞悩绠＄悊鍣�(MMCM)
?MMCM妯″鎻愪緵闆跺欢閬茬珐娌�锛岄牷鐜囧悎鎴愶紝鏅傞悩鐩哥Щ锛岃几鍏ユ姈鍕曟烤娉㈠拰鐩镐綅鍖归厤鏅傞悩鍒嗛牷
?36-Kb濉奟AM / FIFO
?闆欑鍙AM妯″
?鍙法绋嬬殑
銆傞洐绔彛瀵害楂橀仈(d谩)36浣�
銆傜啊鍠殑闆欑鍙ｅ搴﹂珮閬�(d谩)72浣�
?澧炲挤(qi谩ng)鐨勫彲绶ㄧ▼FIFO閭忚集
?鍏�(n猫i)缃彲閬哥殑绯鹃尟闆昏矾
?鍙伕鎿囧皣姣忓�嬪鐢ㄤ綔鍏╁�嬬崹(d煤)绔嬬殑18 Kb濉�
?楂樻�ц兘骞惰SelectIO?鎶�琛�(sh霉)
?1.2鑷�2.5VI / O鎿嶄綔
?浣跨敤ChipSync?鎶�琛�(sh霉)閫�(j矛n)琛屾簮鍚屾鎺ュ彛
?鏁�(sh霉)瀛楁帶鍒堕樆鎶�(DCI)鏈夋簮绲傜
?闈堟椿鐨勭窗(x矛)绮掑害I / O閵�琛屾キ(y猫)鍕�(w霉)
?鏀寔楂橀�熷瓨鍎插櫒鎺ュ彛锛屽叿鏈夐泦鎴愮殑瀵叆鍧囪 鍔熻兘
?鍏堥��(j矛n)鐨凞SP48E1鍒囩墖
?25 x 18锛屼簩閫�(j矛n)鍒惰(b菙)纰间箻娉曞櫒/绱姞鍣�
?鍙伕鐨勬祦姘寸窔
?鏂扮殑鍙伕闋�(y霉)鍔犳硶鍣�锛屽彲鍗�(xi茅)鍔╅亷婵炬噳(y墨ng)鐢ㄧ▼搴�
?鍙伕鐨勬寜浣嶉倧杓姛鑳�
?灏堢敤绱氳伅(li谩n)閫ｆ帴
?闈堟椿鐨勯厤缃伕闋�(xi脿ng)
?SPI鍜屽苟琛孎lash鎺ュ彛
?鍏锋湁灏堢敤鍥為��閲嶉厤缃倧杓殑澶氭瘮鐗规祦鏀寔
?鑷嫊绺界窔瀵害妾㈡脯
?鎵�鏈夎ō(sh猫)鍌欎笂鐨勭郴绲�(t菕ng)鐩�(ji膩n)瑕栧櫒鍔熻兘
?鐗囦笂/鐗囧鐔遍噺鍜岄浕婧愰浕澹撶洠(ji膩n)鎺�
?JTAG瑷晱鎵�鏈夊彈鐩�(ji膩n)鎺х殑鏁�(sh霉)閲�
?鐢ㄤ簬PCIExpress?瑷�(sh猫)瑷堢殑闆嗘垚鎺ュ彛妯″
?绗﹀悎PCI Express Base Specification 2.0
?Gen1(2.5 Gb / s)鍜孏en2(5 Gb / s)鏀寔GTX鏀剁櫦(f膩)鍣�
?绔粸(di菐n)鍜屾牴绔彛鑳藉
?姣忓�嬪x1锛寈2锛寈4鎴杧8閫氶亾鏀寔
?GTX鏀剁櫦(f膩)鍣細楂橀仈(d谩)6.6 Gb / s
?FPGA閭忚集涓殑閬庨噰妯ｆ敮鎸佷綆浜�480 Mb / s鐨勬暩(sh霉)鎿�(j霉)閫熺巼銆�
?GTH鏀剁櫦(f膩)鍣細2.488 Gb / s鑷宠秴閬�11 Gb / s
?闆嗘垚鐨�10/100/1000 Mb / s浠ュお缍�(w菐ng)MAC濉�
?浣跨敤GTX鏀剁櫦(f膩)鍣ㄦ敮鎸�1000BASE-X PCS / PMA鍜孲GMII
?浣跨敤SelectIO鎶�琛�(sh霉)璩囨簮鏀寔MII锛孏MII鍜孯GMII
?鎻愪緵2500Mb / s鏀寔
?40 nm閵匔MOS宸ヨ棟鎶�琛�(sh霉)
?1.0V鏍稿績闆诲(鍍呴檺-1锛�-2锛�-3閫熷害绛夌礆)
?浣庡姛鑰�0.9V鏍稿績闆诲閬搁爡(xi脿ng)(鍍呴檺-1L閫熷害绛夌礆)
?楂樹俊铏熷畬鏁存�у�掕鑺墖灏佽锛屾彁渚涙(bi膩o)婧�(zh菙n)鎴栫劇閴涘皝瑁濋伕闋�(xi脿ng)
XC6VLX130T-1FF1156I绗﹁櫉
XC6VLX130T-1FF1156I鑵冲嵃
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