鏅傞枔锛�2025/5/7 16:38:18
闁辫畝锛�32
XC6SLX75-2FG484C 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Spartan-6 绯诲垪 FPGA 鑺墖涓殑涓�鍊嬪瀷铏熴�係partan-6 绯诲垪 FPGA 閲濆皪浣庢垚鏈�銆佷綆鍔熻�楃殑鎳夌敤鍫存櫙瑷▓锛岄仼鍚堟秷璨婚浕瀛愩�侀�氫俊銆佸伐妤�(y猫)鎺у埗绛夐牁鍩�銆�
銆�銆�瑭茶姱鐗囬噰鐢� 45nm 鍒剁▼宸ヨ棟鍒堕��锛屽叿鍌欓潏娲荤殑閭忚集鍠厓銆佽睈瀵岀殑宓屽叆寮忓瓨鍎插櫒鍜� DSP 妯″璩囨簮锛屽悓鏅傛敮鎸佸绋帴鍙ｆ婧栧拰楂樻�ц兘鏅傞悩绠＄悊鍔熻兘锛屾豢瓒冲京闆滅郴绲�(t菕ng)鐨勮ō瑷堥渶姹�銆�
鍨嬭櫉锛歑C6SLX75-2FG484C
銆�銆�灏佽锛欶G484
銆�銆�閫熷害绛夌礆锛�-2
銆�銆�閭忚集鍠厓鏁�(sh霉)锛�75000
銆�銆�Block RAM锛�1392KB
銆�銆�DSP Slice锛�160
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�344
銆�銆�閰嶇疆妯″紡锛歋electMAP 鍜� Master/Slave SPI
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +85掳C
XC6SLX75-2FG484C 鐨勪富瑕佺壒鎬у寘鎷細
銆�銆�1. 鍏�(n猫i)缃� Block RAM 鍜� Distributed RAM锛屾敮鎸佸ぇ瀹归噺鏁�(sh霉)鎿�(j霉)瀛樺劜鑸囧揩閫熻í鍟忋��
銆�銆�2. 鎻愪緵澶氶仈 160 鍊� DSP Slice锛岄仼鐢ㄤ簬楂樼簿搴︽暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�3. 鏀寔 PCI Express銆丟igabit Ethernet 鍜� Serial RapidIO 绛夐珮閫熸帴鍙ｅ崝(xi茅)璀�銆�
銆�銆�4. 闆嗘垚 DCM锛堟暩(sh霉)瀛楁檪閻樼鐞嗘ā濉婏級鍜� PLL锛堥帠鐩哥挵(hu谩n)锛�锛屽彲瀵︾従(xi脿n)绮炬簴鐨勬檪閻樼鐞嗗拰浣庢姈鍕曟�ц兘銆�
銆�銆�5. 鎻愪緵闈堟椿鐨勯厤缃伕闋�锛屽寘鎷緸闁冨瓨鎴栧閮ㄤ富姗熷姞杓夐厤缃暩(sh霉)鎿�(j霉)銆�
銆�銆�6. 浣庡姛鑰楁灦妲嬬祼鍚堝嫊鎱�(t脿i)闆绘簮绠＄悊鎶�琛�锛岃兘澶犳湁鏁堥檷浣庣郴绲�(t菕ng)鑳借�椼��
銆�銆�7. 鏀寔閮ㄥ垎閲嶉厤缃姛鑳�锛屽厑瑷卞湪閬嬭鏈熼枔鏇存柊鐗瑰畾鍗�(q奴)鍩熺殑閭忚集鍔熻兘銆�
銆�銆�8. 璞愬瘜鐨勫瑷敮鎸�锛屽寘鎷� UART銆両2C 鍜� SPI 鎺ュ彛绛�锛岀啊鍖栬垏澶栭儴瑷倷鐨勯�ｆ帴銆�
XC6SLX75-2FG484C 寤ｆ硾鎳夌敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 宸ユキ(y猫)鑷嫊鍖栨帶鍒讹細濡傛鍣ㄤ汉鎺у埗绯荤当(t菕ng)銆侀亱鍕曟帶鍒跺櫒鍜屽鏅傛暩(sh霉)鎿�(j霉)閲囬泦銆�
銆�銆�2. 閫氫俊瑷倷锛氱敤浜庡熀甯惰檿鐞�銆佷俊閬撶法纰煎拰瑙ｇ⒓浠ュ強缍�(w菐ng)绲′氦鎻涖��
銆�銆�3. 娑堣不椤為浕瀛愮敘(ch菐n)鍝侊細渚嬪楂樻竻瑕栭牷铏曠悊銆佸湒鍍忚瓨鍒ュ拰澶氬獟楂旀挱鏀惧櫒銆�
銆�銆�4. 閱�(y墨)鐧傝ō鍌欙細鍖呮嫭瓒呰伈娉㈡垚鍍�銆佺梾浜虹洠(ji膩n)璀峰剙鍜屼究鏀滃紡瑷烘柗鍎�鍣ㄣ��
銆�銆�5. 姹借粖闆诲瓙锛氭敮鎸侀珮绱氶椐涜紨鍔╃郴绲�(t菕ng) (ADAS) 鍜岃粖杓変俊鎭妯傜郴绲�(t菕ng)銆�
銆�銆�6. 鑸┖鑸ぉ鍜屽湅闃诧細濡傞浄閬斾俊铏熻檿鐞�銆佽(w猫i)鏄熼�氫俊鍜屽皫鑸郴绲�(t菕ng)銆�
銆�銆�鍏跺挤澶х殑閭忚集璩囨簮鍜岄珮閫熸帴鍙ｈ兘鍔涗娇鍏舵垚鐐哄闋樺煙寰╅洔绯荤当(t菕ng)鐨勭悊鎯抽伕鎿囥��
XC6SLX75T-2FGG484C
銆�銆�XC6SLX75-3FG484C
