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鎻忚堪	闆嗘垚闆昏矾FPGA 316 I/O 484FBGA
鍒嗛	闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁€闄ｅ垪)
鍒堕€犲晢	Xilinx鍏徃
绯诲垪	Spartan?-6LX
鎵撳寘	鎵樼洡
闆朵欢鐙€鎱�(t脿i)	娲绘€�
闆诲-闆绘簮	1.14V?1.26V
-40掳C?100掳C(TJ)	-40掳C?100掳C(TJ)
鍖呰/绠�	484-BBGA
渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏寘瑁�	484-FBGA(23x23)
鍩烘湰闆朵欢铏�	XC6SLX45

鐢�(ch菐n)鍝佸湒鐗�

XC6SLX45-3FGG484I

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绗﹀悎姝愮洘RoHS	鏄�
鐙€鎱�(t脿i)	娲绘€�
鏈€澶ф檪(sh铆)閻橀牷鐜�	862.0鍏嗚但
CLB-Max鐨勭祫鍚堝欢閬�	0.21绱嶇
JESD-30浠ｇ⒓	S-PBGA-B484
JESD-609浠ｇ⒓	1铏�
绺絉AM浣�	2138112
CLB鏁�(sh霉)閲�	3411.0
杓稿叆鏁�(sh霉)閲�	316.0
閭忚集鍠厓鏁�(sh霉)	43661.0
杓稿嚭鏁�(sh霉)閲�	316.0
绔瓙鏁�(sh霉)	484
鏈€浣庡伐浣滄韩搴�	-40鈩�
鏈€楂樺伐浣滄韩搴�	100鈩�
绲勭箶	3411 CLBS
宄板€煎洖娴佹韩搴�(鈩�)	250
闆绘簮	1.2,2.5 / 3.3
璩囨牸鐙€鎱�(t脿i)	涓嶅悎鏍�
搴ч珮	2.6姣背
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婧害绛夌礆	鐢�(ch菐n)妤�(y猫)
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绲傜琛ㄦ牸	鐞�
绔瓙闁撹窛	1.0姣背
绲傜浣嶇疆	搴曢儴
鏅�(sh铆)闁揁宄板€煎洖娴佹韩搴︽渶澶у€�(绉�)	30
闀峰害	23.0姣背
瀵害	23.0姣背
鍖呰涓婚珨鏉愭枡	濉戞枡/鐠�(hu谩n)姘фü鑴�
鍖呰浠ｇ⒓	BGA
鍖呰绛夋晥浠ｇ⒓	BGA484,22X22,40
鍖呰褰㈢媭	寤ｅ牬
鍖呰褰㈠紡	缍�(w菐ng)鏍奸櫍鍒�
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姘村垎鏁忔劅鎬ф按骞�(MSL)	3(168灏忔檪(sh铆))

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