鏅傞枔锛�2023/8/2 17:50:27
闁辫畝锛�796
鐢�(ch菐n)鍝佸瀷铏� | XC6SLX25-2FTG256C |
鎻忚堪 | 闆嗘垚闆昏矾FPGA 186 I/O 256FTBGA |
鍒嗛 | 闆嗘垚闆昏矾(IC)锛屽祵鍏ュ紡-FPGA(鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪) |
鍒堕�犲晢 | Xilinx鍏徃 |
绯诲垪 | Spartan?-6LX |
闆朵欢鐙�鎱�(t脿i) | 娲绘�� |
闆诲-闆绘簮 | 1.14V?1.26V |
宸ヤ綔婧害 | 0掳C?85掳C(TJ) |
鍖呰/绠� | 256纾� |
渚涙噳鍟嗚ō鍌欏寘瑁� | 256-FTBGA(17x17) |
鍩烘湰闆朵欢铏� | XC6SLX25 |
XC6SLX25-2FTG256C
鍙法绋嬮倧杓鍨� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
绗﹀悎REACH | 鏄� |
绗﹀悎姝愮洘RoHS | 鏄� |
绗﹀悎涓湅RoHS | 鏄� |
鐙�鎱�(t脿i) | 娲绘�� |
鏈�澶ф檪閻橀牷鐜� | 667.0鍏嗚但 |
CLB-Max鐨勭祫鍚堝欢閬� | 0.26绱嶇 |
JESD-30浠ｇ⒓ | S-PBGA-B256 |
JESD-609浠ｇ⒓ | 1铏� |
绺絉AM浣� | 958464 |
CLB鏁�(sh霉)閲� | 1879.0 |
杓稿叆鏁�(sh霉)閲� | 186.0 |
閭忚集鍠厓鏁�(sh霉) | 24051.0 |
杓稿嚭鏁�(sh霉)閲� | 186.0 |
绔瓙鏁�(sh霉) | 256 |
鏈�浣庡伐浣滄韩搴� | 0鈩� |
鏈�楂樺伐浣滄韩搴� | 85鈩� |
绲勭箶 | 1879骞� |
宄板�煎洖娴佹韩搴�(鈩�) | 260 |
闆绘簮 | 1.2,2.5 / 3.3 |
璩囨牸鐙�鎱�(t脿i) | 涓嶅悎鏍� |
搴ч珮 | 1.55姣背 |
瀛愰鍒� | 鐝�(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪 |
闆绘簮闆诲妯欑ū | 1.2浼� |
鏈�灏忎緵闆婚浕澹� | 1.14浼� |
鏈�澶ч浕婧愰浕澹� | 1.26浼� |
瀹夎椤炲瀷 | 琛ㄩ潰璨艰 |
鎶�琛� | CMOS |
婧害绛夌礆 | 鍏朵粬 |
绲傜瀹屾垚 | 閷�/閵�/閵�(Sn96.5Ag3.0Cu0.5) |
绲傜琛ㄦ牸 | 鐞� |
绔瓙闁撹窛 | 1.0姣背 |
绲傜浣嶇疆 | 搴曢儴 |
鏅傞枔@宄板�煎洖娴佹韩搴︽渶澶у��(绉�) | 30 |
闀峰害 | 17.0姣背 |
瀵害 | 17.0姣背 |
鍖呰涓婚珨鏉愭枡 | 濉戞枡/鐠�(hu谩n)姘фü鑴� |
鍖呰浠ｇ⒓ | LBGA |
鍖呰绛夋晥浠ｇ⒓ | BGA256,16X16,40 |
鍖呰褰㈢媭 | 寤ｅ牬 |
鍖呰褰㈠紡 | 缍�(w菐ng)鏍肩媭锛屼綆杓粨 |
鍒堕�犲晢鍖呰瑾槑 | 17 X 17 MM锛�1 MM闁撹窛锛岀劇閴涳紝F(xi脿n)BGA-256 |
鐒￠墰鐙�鎱�(t脿i)/RoHS鐙�鎱�(t脿i) | 鐒￠墰/绗﹀悎ROHS3 |
姘村垎鏁忔劅鎬ф按骞�(MSL) | 3(168灏忔檪) |
浜ら尟澧�
鐔辨彃鎷斿悎瑕�(gu墨)
楂橀仈3.2 Gb /s
浣庡櫔鑱�锛岄潏娲荤殑鏅傞悩
2閲濊嚜鍕曟娓厤缃�
灏堢偤浣庢垚鏈�岃ō瑷�
澶氬�嬮珮鏁堥泦鎴愬
鍎�(y艒u)鍖栫殑I / O妯欐簴閬告搰
澶ф壒閲忓鏂欑挡鐒婂皝瑁�
闈滄厠(t脿i)鍜屽嫊鎱�(t脿i)鍔熻�椾綆
Spartan-6 LX FPGA锛氶倧杓劒(y艒u)鍖�
45 nm宸ヨ棟閲濆皪鎴愭湰鍜屼綆鍔熻�楅�茶浜嗗劒(y艒u)鍖�
浼戠湢鎺夐浕妯″紡鍙鐝�(xi脿n)闆跺姛鑰�
澶氶浕澹�锛屽妯欐簴SelectIO?鎺ュ彛搴�
姣忓�嬪樊鍒咺 / O楂橀仈1,080 Mb / s鐨勬暩(sh霉)鎿�(j霉)鍌宠几閫熺巼
鍙伕杓稿嚭椹呭嫊鍣�锛屾瘡鍊嬪紩鑵虫渶澶�24 mA
3.3V鑷�1.2VI / O妯欐簴鍜屽崝(xi茅)璀�
浣庢垚鏈琀STL鍜孲STL瀛樺劜鍣ㄦ帴鍙�
鍙鐨処 / O杞夋彌閫熺巼浠ユ敼鍠勪俊铏熷畬鏁存��
LXT FPGA涓殑楂橀�烥TP涓茶鏀剁櫦(f膩)鍣�
鐢ㄤ簬PCI Express瑷▓(LXT)鐨勯泦鎴愮榛炴ā濉�
楂樻晥鐨凞SP48A1鍒囩墖
楂樻�ц兘绠楄鍜屼俊铏熻檿鐞�
蹇�熺殑18 x 18涔樻硶鍣ㄥ拰48浣嶇疮鍔犲櫒
娴佹按绶氬拰绱氳伅(li谩n)鑳藉姏
闋愬姞鍣ㄤ互鍗�(xi茅)鍔╅亷婵惧櫒鎳夌敤
闆嗘垚鍏у瓨鎺у埗鍣ㄦā濉�
DDR锛孌DR2锛孌DR3鍜孡PDDR鏀寔
鏁�(sh霉)鎿�(j霉)閫熺巼楂橀仈800 Mb / s(12.8 Gb / s宄板�煎付瀵�)
閭忚集璩囨簮璞愬瘜锛岄倧杓兘鍔涘寮�
鍙伕鐨勭Щ浣嶅瘎瀛樺櫒鎴栧垎甯冨紡RAM鏀寔
鍏锋湁澶氱ó绮掑害鐨凚lock RAM
鍏锋湁濉婂鍏ュ姛鑳界殑蹇�熷RAM
鏅傞悩绠＄悊纾佽布(CMT)鍙寮锋�ц兘
閹栫浉鐠�(hu谩n)(PLL)鐢ㄤ簬浣庢姈鍕曟檪閻�
闋荤巼鍚堟垚锛屽悓鏅傞�茶涔樻硶锛岄櫎娉曞拰鐩哥Щ
16鍊嬩綆鍋忔枩鐨勫叏鐞冩檪閻樼恫(w菐ng)绲�
绨″寲閰嶇疆锛屾敮鎸佷綆鎴愭湰妯欐簴
寤ｆ硾鐨勭涓夋柟SPI(鏈�楂榵4)鍜孨OR闁冨瓨鏀寔
鍏锋湁JTAG鐨勫姛鑳借睈瀵岀殑Xilinx骞宠嚭闁冨瓨
澧炲挤鐨勫畨鍏ㄦ��锛屽彲淇濊瑷▓
鍞竴鐨勮ō鍌橠NA妯欒瓨绗�锛岀敤浜庤ō瑷堥璀�
澶у瀷瑷倷涓殑AES姣旂壒娴佸姞瀵�
妤�(y猫)鐣岄牁鍏堢殑IP鍜屽弮鑰冭ō瑷�
18 Kb濉婂彲浠ラ伕鎿囩法绋嬬偤鍏╁�嬬崹绔嬬殑9 Kb濉奟AM
楂樻晥鐨�6杓稿叆LUT鍙彁楂樻�ц兘骞舵渶澶х▼搴﹀湴闄嶄綆鍔熻��
鍏锋湁闆欒Ц鐧�(f膩)鍣ㄧ殑LUT锛岄仼鐢ㄤ簬浠ョ绶氱偤涓績鐨勬噳鐢�
浣庢垚鏈琍CI?鎶�琛撴敮鎸佽垏33 MHz锛�32浣嶅拰64浣嶈(gu墨)鑼冨吋瀹�
鍏锋湁鐛ㄧ珛FIFO鐨勫绔彛绺界窔绲愭鍙笡灏戣ō瑷堟檪搴忓晱椤�
鏁�(sh霉)瀛楁檪閻樼鐞嗗櫒(DCM)娑堥櫎浜嗘檪閻樺亸鏂滃拰鍗犵┖姣斿け鐪�
鎺涜捣妯″紡閫氶亷澶氬紩鑵冲枤閱�锛屾帶鍒跺寮蜂締缍寔鐙�鎱�(t脿i)鍜岄厤缃�
鍊熷姪澧炲挤鐨勪綆鎴愭湰MicroBlaze?杌熻檿鐞嗗櫒瀵︾従(xi脿n)鏇村揩鐨勫祵鍏ュ紡铏曠悊
MultiBoot鏀寔浣跨敤鐪嬮杸鐙椾繚璀峰姛鑳藉皪澶氬�嬫瘮鐗规祦閫茶閬犵▼鍗囩礆
楂橀�熸帴鍙ｏ紝鍖呮嫭锛氫覆琛孉TA锛孉urora锛�1G浠ュお缍�(w菐ng)锛孭CI Express锛孫BSAI锛孋PRI锛孍PON锛孏PON锛孌isplayPort鍜孹AUI
XC6SLX25-2FTG256C绗﹁櫉
XC6SLX25-2FTG256C鑵冲嵃
