鏅傞枔锛�2025/4/28 18:18:51
闁辫畝锛�33
XC6SLX16-2FT256I 鏄� Xilinx 鍏徃鎺ㄥ嚭鐨� Spartan-6 绯诲垪 FPGA 鑺墖涓殑涓�鍊嬪瀷铏熴�傝┎鑺墖閲囩敤鍏堥�茬殑 40nm 宸ヨ棟鍒堕��锛屽叿鍌欓珮闆嗘垚搴�銆佷綆鍔熻�椾互鍙婇潏娲荤殑鍙法绋嬮倧杓硣婧�銆�
銆�銆�Spartan-6 绯诲垪涓昏瀹氫綅浜庝腑浣庣鎳夌敤甯傚牬锛岄仼鐢ㄤ簬鎴愭湰鏁忔劅鍨嬪拰鍔熻�楁晱鎰熷瀷瑷�(sh猫)瑷堝牬鏅�銆俋C6SLX16 鍖呭惈 16K 鐨勯倧杓柈鍏冿紙CLB锛�锛屽苟鏀寔澶氱ó宓屽叆寮忔ā濉婂 DSP Slice 鍜� Block RAM锛屼娇鍏堕潪甯搁仼鍚堢敤浜庨�氫俊鎺ュ彛銆佷俊铏熻檿鐞嗗強宸ユキ(y猫)鎺у埗绛夐牁(l菒ng)鍩�銆�
鍨嬭櫉锛歑C6SLX16-2FT256I
銆�銆�绯诲垪锛歋partan-6
銆�銆�宸ヨ棟鍒剁▼锛�40nm
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細16,384
銆�銆�DSP Slice 鏁�(sh霉)閲忥細120
銆�銆�Block RAM 瀹归噺锛�390 Kbits
銆�銆�I/O 寮曡叧鏁�(sh霉)锛�174
銆�銆�閰嶇疆妯″紡锛歁aster/Slave Serial, Master/Slave SelectMAP, Boundary Scan
銆�銆�灏佽椤炲瀷锛欶T256
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�鏅傞悩闋荤巼锛氶珮閬� 500 MHz
XC6SLX16-2FT256I 鎻愪緵浜嗗挤澶х殑鍙法绋嬮倧杓兘鍔涳紝鍚屾檪鍏奸¨浜嗗姛鑰楄垏鎬ц兘鐨勫钩琛�銆�
銆�銆�1. 鍏�(n猫i)缃睈瀵岀殑纭牳妯″锛氬寘鎷� PCIe Endpoint 妯″銆丏DR2/DDR3 鎺у埗鍣ㄧ瓑锛岃兘澶犵啊鍖栧京闆滅郴绲�(t菕ng)鐨勮ō(sh猫)瑷堟祦绋嬨��
銆�銆�2. 楂樻晥鐨勫瓨鍎插櫒鏋舵(g貌u)锛氶泦鎴愪簡澶氶仈 390Kb 鐨勫垎甯冨紡鍜屽鐙� RAM锛岀偤鏁�(sh霉)鎿�(j霉)绶╁瓨鍜屾煡鎵捐〃鎻愪緵浜嗗厖瓒崇┖闁撱��
銆�銆�3. DSP Slice 鏀寔锛氭搧鏈� 120 鍊嬪皥鐢� DSP Slice锛屽彲浠ュ姞閫熸诞榛為亱绠楀拰鏁�(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�銆�
銆�銆�4. 鍙摯灞曟�у挤锛氶�氶亷璞愬瘜鐨勫瑷�(sh猫)鎺ュ彛閬搁爡锛屼究浜庨�ｆ帴澶栭儴瑷�(sh猫)鍌欐垨瀛愭澘銆�
銆�銆�5. 闈堟椿鐨勯厤缃柟寮忥細鏀寔澶氱ó鍟熷嫊閰嶇疆妯″紡锛屾豢瓒充笉鍚屾噳鐢ㄥ牬鏅渶姹�銆�
銆�銆�姝ゅ锛屽畠閭勫叿鏈夎純浣庣殑鎴愭湰鍎�(y艒u)鍕�锛屽湪澶ф壒閲忕敓鐢�(ch菐n)涓湁杓冮珮鐨勬�у児姣斻��
XC6SLX16-2FT256I 寤ｆ硾鎳夌敤浜庡鍊嬮牁(l菒ng)鍩燂細
銆�銆�1. 宸ユキ(y猫)鑷嫊鍖栵細鐢ㄤ簬瀵︽檪鎺у埗銆侀亱鍕曟帶鍒跺拰鏁�(sh霉)鎿�(j霉)閲囬泦銆�
銆�銆�2. 宓屽叆寮忚瑕猴細鏀寔鍦栧儚铏曠悊绠楁硶瀵︾従(xi脿n)锛屼緥濡傛鍣ㄨ瑕烘娓�銆�
銆�銆�3. 閫氫俊鍩虹(ch菙)瑷�(sh猫)鏂斤細鍙敤浜庡熀绔�銆佽矾鐢卞櫒鍜屽叾浠栫恫(w菐ng)绲¤ō(sh猫)鍌欎腑鐨勫崝(xi茅)璀拌綁(zhu菐n)鎻涘拰鏁�(sh霉)鎿�(j霉)娴佺鐞嗐��
銆�銆�4. 娑堣不椤為浕瀛愮敘(ch菐n)鍝侊細濡傝闋荤法纰艰В纰煎櫒銆侀珮娓呴’绀洪﹨(q奴)鍕曠瓑銆�
銆�銆�5. 閱�(y墨)鐧傝ō(sh猫)鍌欙細鐢ㄤ簬瓒呰伈娉㈡垚鍍忋�佹偅鑰呯洠(ji膩n)璀峰剙绛夊姛鑳芥ā濉婄殑闁嬬櫦(f膩)銆�
銆�銆�6. 姹借粖闆诲瓙锛氭敮鎸� ADAS锛堥珮绱氶椐涜紨鍔╃郴绲�(t菕ng)锛夌浉闂�(gu膩n)鐨勫偝鎰熷櫒铻嶅悎鍜屾暩(sh霉)鎿�(j霉)铏曠悊銆�
XC6SLX16-2CSG324C, XC6SLX16-2FTG256C, XC6SLX16-2CPG196C
