鏅傞枔锛�2025/4/29 18:24:38
闁辫畝锛�34
XC6SLX16-2CS225I 鏄� Xilinx 鍏徃 Spartan-6 绯诲垪 FPGA 鐨勪竴绋瀷铏熴�係partan-6 FPGA 鏄潰鍚戜腑绔噳鐢ㄧ殑鍙法绋嬮倧杓櫒浠�锛屽叿鏈夐珮鎬у児姣斿拰浣庡姛鑰楃殑鐗归粸銆傝┎绯诲垪閬╁悎浜庨渶瑕佸京闆滈倧杓帶鍒�銆佹暩(sh霉)鎿�(j霉)铏曠悊鍜屾帴鍙ｅ姛鑳界殑鎳夌敤鍫存櫙銆�
銆�銆�XC6SLX16 鏄� Spartan-6 绯诲垪涓殑灏忓瀷鍖栫増鏈�锛屽収(n猫i)閮ㄥ寘鍚� 16,384 鍊嬮倧杓柈鍏冿紙CLB锛�锛屾敮鎸� DSP 鐗�銆佸 RAM 鍜屽垎甯冨紡 RAM 绛夊绋硣婧愩�傚叾灏佽褰㈠紡鐐� CS225I锛屽爆浜庣窗闁撹窛 BGA 灏佽锛屽紩鑵虫暩(sh霉)鐐� 225銆�
绯诲垪锛歋partan-6
銆�銆�鍨嬭櫉锛歑C6SLX16
銆�銆�閫熷害绛夌礆锛�-2
銆�銆�灏佽锛欳S225I
銆�銆�閰嶇疆妯″紡锛歋lave Serial
銆�銆�閭忚集鍠厓鏁�(sh霉)閲忥細16,384
銆�銆�DSP Slice 鏁�(sh霉)閲忥細40
銆�銆�Block RAM 鏁�(sh霉)閲忥細132 KB
銆�銆�I/O 鏁�(sh霉)閲忥細176
銆�銆�宸ヤ綔婧害鑼冨湇锛�-40掳C 鑷� +100掳C
銆�銆�渚涢浕闆诲锛�1.2V 鏍稿績锛�1.5V 鎴� 3.3V I/O
XC6SLX16-2CS225I 鎻愪緵浜嗚睈瀵岀殑閭忚集璩囨簮鍜屽绋収(n猫i)缃姛鑳芥ā濉�锛屼娇鍏堕潪甯搁仼鍚堢敤浜庡祵鍏ュ紡绯荤当(t菕ng)瑷▓銆備互涓嬫槸涓昏鐗规�э細
銆�銆�1. 鍏�(n猫i)缃� DSP48A1 妯″锛屾敮鎸侀珮鏁堢殑鏁�(sh霉)瀛椾俊铏熻檿鐞嗘搷浣�锛屽涔樻硶绱姞閬嬬畻銆�
銆�銆�2. 鍙厤缃� Block RAM 璩囨簮锛岀敤浜庡鐝�(xi脿n) FIFO 绶╂矕鍗�(q奴)銆佹煡鎵捐〃鎴栧皬瑕�(gu墨)妯″瓨鍎插櫒銆�
銆�銆�3. 楂橀�熶覆琛屾敹鐧�(f膩)鍣ㄦ敮鎸侀珮閬� 3.125Gbps 鐨勬暩(sh霉)鎿�(j霉)閫熺巼銆�
銆�銆�4. 鏀寔澶氱ó閰嶇疆妯″紡锛屽寘鎷緸 Flash 鍟熷嫊鎴栭�氶亷澶栭儴涓绘帶鍒跺櫒鍔犺級浣嶆祦銆�
銆�銆�5. 寮曡叧鍏煎鎬ц壇濂�锛屼究浜庡湪涓嶅悓瀹归噺鐨� XC6SLX 鍣ㄤ欢涔嬮枔閬风Щ銆�
銆�銆�6. 鎻愪緵瀹屾暣鐨勯枊鐧�(f膩)宸ュ叿閺堟敮鎸�锛屼緥濡� Xilinx ISE 鍜� Vivado 瑷▓濂椾欢銆�
XC6SLX16-2CS225I 甯哥敤浜庝互涓嬮牁鍩燂細
銆�銆�1. 宸ユキ(y猫)鑷嫊鍖栬ō鍌欎腑鐨勫鏅傛帶鍒惰垏鐩�(ji膩n)娓�銆�
銆�銆�2. 閱�(y墨)鐧傛垚鍍忕郴绲�(t菕ng)鐨勫湒鍍忚檿鐞嗗拰鏁�(sh霉)鎿�(j霉)鍌宠几銆�
銆�銆�3. 瑕栭牷鐩�(ji膩n)鎺х郴绲�(t菕ng)涓殑绶ㄨВ纰煎強瑕栭牷娴佺鐞�銆�
銆�銆�4. 閫氫俊瑷倷涓殑鍗�(xi茅)璀拌綁(zhu菐n)鎻涘拰淇¤櫉瑾�(di脿o)鐞嗐��
銆�銆�5. 娓│娓噺鍎�鍣ㄤ腑鐨勬暩(sh霉)鎿�(j霉)閲囬泦鍜屽垎鏋�銆�
銆�銆�6. 姹借粖闆诲瓙涓殑 ADAS 杓斿姪椐曢鍔熻兘瀵︾従(xi脿n)銆�
銆�銆�鐢变簬鍏堕潏娲绘�у拰楂樻�ц兘锛岄�欐 FPGA 鍦ㄨū澶氶渶瑕佽嚜瀹氱京閭忚集鍜屽揩閫熷師鍨嬮璀夌殑鎳夌敤涓〃鐝�(xi脿n)鍎�(y艒u)鐣�銆�
XC6SLX9-2CSG324C, XC6SLX25-2CSG324C, XC6SLX45-2FGG484C
