鍨嬭櫉(h脿o)锛歑C6S-LX25-2FTG256I
銆�銆�鍝佺墝锛歑ilinx
銆�銆�绯诲垪锛歋partan-6
銆�銆�FPGA瑕�(gu墨)妯★細25K Logic Cells
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銆�銆�I/O鏁�(sh霉)閲忥細196
銆�銆�鐢ㄦ埗鍙�鐢≧AM锛�180KB (Block RAM)
銆�銆�DSP Slice鏁�(sh霉)閲忥細54
銆�銆�鏈�澶у伐浣滈牷鐜囷細500 MHz
銆�銆�灏佽�濋�炲瀷锛欶ineLine BGA (FTG256)
銆�銆�閫熷害绛夌礆(j铆)锛�-2
銆�銆�渚涢浕闆诲�擄��1.2V 鏍稿績闆诲�擄��3.3V 鎴� 2.5V I/O 闆诲��

XC6S-LX25-2FTG256I 鐨勪富瑕佺壒鎬у寘鎷�锛�
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銆�銆�2. 鍏�(n猫i)缃� Block RAM 鍜� Distributed RAM锛屾彁渚涢潏娲荤殑瀛樺劜(ch菙)瑙ｆ焙鏂规��銆�
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銆�銆�6. 鍏�(n猫i)閮ㄨ硣婧愯睈瀵岋紝鑳藉��?q奴)宕縁(xi脿n)澶ц��(gu墨)妯￠倧杓�鍔熻兘闆嗘��銆�
銆�銆�7. 鍏峰倷鍕�(d貌ng)鎱�(t脿i)闆绘簮绠＄悊鍔熻兘锛屾湁鍔╀簬闄嶄綆鏁撮珨鍔熻�椼��
銆�銆�8. 鏀�鎸佸�氱ó绺界窔妯�(bi膩o)婧�(zh菙n)锛屼緥濡� PCI銆佷互澶�缍�(w菐ng) MAC 绛�锛屾柟渚跨郴绲�(t菕ng)绱�(j铆)鏁村悎銆�
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XC6S-LX25-2FTG256I 寤ｆ硾鎳�(y墨ng)鐢ㄤ簬浠ヤ笅闋�(l菒ng)鍩燂細
銆�銆�1. 宸ユキ(y猫)鑷�鍕�(d貌ng)鍖栬ō(sh猫)鍌欎腑鐨勫��(sh铆)鏅�(sh铆)鎺у埗妯″�娿��
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銆�銆�瑭茶姱鐗囨啈鍊熷叾鑹�濂界殑鎬у児(ji脿)姣斿拰闈堟椿鎬�锛屽湪涓婅堪闋�(l菒ng)鍩熺殑涓�灏忚��(gu墨)妯¤ō(sh猫)瑷�(j矛)涓�灏ょ偤閬╃��銆�

XC6SLX25T-2FGG400C, XC6SLX25-3FTG256I