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鎮ㄥソ锛屾杩庝締鍒扮董搴浕瀛愬競鍫寸恫(w菐ng) 鐧婚寗 | 鍏嶈不娉ㄥ唺

鎮ㄦ墍鍦ㄧ殑浣嶇疆锛�闆诲瓙鍏冨櫒浠堕噰璩肩恫(w菐ng) > IC鐧剧 > XC5VSX50T-1FFG1136C

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绯诲垪锛歏irtex-5
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銆�銆�鍨嬭櫉锛歑C5VSX50T-1FFG1136C
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銆�銆�閰嶇疆妯″紡锛歋electMAP銆丮aster SPI銆丼lave SPI銆丅oundary Scan
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銆�銆�灏佽褰㈠紡锛欶FG1136
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XC5VSX50T-1FFG1136C 鎻愪緵浜嗗挤澶х殑鏁�(sh霉)瀛椾俊铏熻檿鐞嗚兘鍔�锛屽収(n猫i)缃鍊� DSP48 Slice 鍠厓鐢ㄤ簬楂樻晥瀵︾従(xi脿n)涔樻硶绱姞閬嬬畻銆傚畠鏀寔澶氱ó楂橀�熶覆琛屾帴鍙�锛屼緥濡� RocketIO 鏀剁櫦(f膩)鍣�锛屽彲浠ラ仈(d谩)鍒� 6.5 Gbps 鐨勫偝杓搁�熺巼銆�
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鏇夸唬鍨嬭櫉

XC5VSX50T-1FFG676C
銆�銆�XC5VSX50T-1FFG676I
銆�銆�XC5VSX50T-1FFG1136I

xc5vsx50t-1ffg1136c鎺ㄨ枽渚涙噳(y墨ng)鍟� 鏇村>

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  • 渚涙噳(y墨ng)鍟�
  • 鏁�(sh霉)閲�
  • 寤犲晢
  • 灏佽/鎵硅櫉
  • 瑭㈠児

xc5vsx50t-1ffg1136c鍙冩暩(sh霉)

  • 妯�(bi膩o)婧�(zh菙n)鍖呰1
  • 椤炲垾闆嗘垚闆昏矾 (IC)
  • 瀹跺涵宓屽叆寮� - FPGA锛堢従(xi脿n)鍫村彲绶ㄧ▼闁�闄ｅ垪锛�
  • 绯诲垪Virtex®-5 SXT
  • LAB/CLB鏁�(sh霉)4080
  • 閭忚集鍏冧欢/鍠厓鏁�(sh霉)52224
  • RAM 浣嶇附瑷�4866048
  • 杓稿叆/杓稿嚭鏁�(sh霉)480
  • 闁�鏁�(sh霉)-
  • 闆绘簮闆诲0.95 V ~ 1.05 V
  • 瀹夎椤炲瀷琛ㄩ潰璨艰
  • 宸ヤ綔婧害0°C ~ 85°C
  • 灏佽/澶栨1136-BBGA锛孎(xi脿n)CBGA
  • 渚涙噳(y墨ng)鍟嗚ō(sh猫)鍌欏皝瑁�1136-FCBGA
  • 閰嶇敤568-5088-ND - BOARD DEMO DAC1408D750122-1796-ND - EVALUATION PLATFORM VIRTEX-5
  • 鍏跺畠鍚嶇ū122-1567