灏佽�濓細FFG676
銆�銆�閫熷害绛夌礆锛�-2
銆�銆�I/O鏁�(sh霉)閲忥細432
銆�銆�閰嶇疆妯″紡锛歋electMAP, JTAG
銆�銆�RAM澶�?銆�?497.6 Kb
銆�銆�DSP Slices鏁�(sh霉)閲忥細320
銆�銆�閭忚集鍠�鍏冩��(sh霉)閲忥細50272
銆�銆�鏈�澶у伐浣滈牷鐜囷細550 MHz
銆�銆�闆绘簮闆诲�擄��1.0V锛堝収(n猫i)鏍革級锛�1.8V/2.5V/3.3V锛圛/O锛�
銆�銆�宸ヤ綔婧�搴﹁寖鍦嶏��-40掳C 鑷� +85掳C

XC5VLX50-2FFG676I鍏锋湁浠ヤ笅椤�钁楃壒鎬э細
銆�銆�1. 楂樻�ц兘鏋舵��(g貌u)锛氶噰鐢ˋSMBL锛圓dvanced Silicon Modular Block Architecture锛夋妧琛�(sh霉)锛屾彁渚涢潏娲荤殑瑷�(sh猫)瑷堟敮鎸�銆�
銆�銆�2. DSP鍔熻兘澧炲挤锛氬収(n猫i)缃�灏堢敤DSP Slice妯″�婏紝姣忓�婦SP Slice鍙�浠ュ��(zh铆)琛屼箻娉曠疮鍔犻亱绠�锛岄仼鍚堢敤浜庢暩(sh霉)瀛椾俊铏熻檿鐞嗕换鍕�(w霉)銆�
銆�銆�3. 澶у�归噺瀛樺劜锛氶泦鎴愬ぇ閲忓垎甯冨紡RAM鍜屽�奟AM璩囨簮锛屼究浜庡�︾��(xi脿n)寰�(f霉)闆滅殑绠楁硶鍜屾暩(sh霉)鎿�(j霉)绶╂矕銆�
銆�銆�4. 楂橀�熶覆琛岄�ｆ帴锛氭敮鎸佸�氳矾楂橀�熶覆琛屾敹鐧�(f膩)鍣�锛岄�熺巼鍙�閬�6.5Gbps锛屾豢瓒崇従(xi脿n)浠ｉ�氫俊绯荤当(t菕ng)鐨勯渶姹�銆�
銆�銆�5. 浣庡姛鑰楀劒(y艒u)鍖栵細閫氶亷鍕曟厠(t脿i)鍔熻�楃�＄悊鎶�琛�(sh霉)闄嶄綆閬嬭�屾檪鐨勫姛鑰椼��
銆�銆�6. 寮峰ぇ鐨処P鏀�鎸侊細Xilinx鎻愪緵寤ｆ硾鐨処P Core搴�锛屾柟渚跨敤鎴跺揩閫熸��(g貌u)寤虹郴绲�(t菕ng)绱氳В姹烘柟妗堛��
銆�銆�7. 鍙�闈犳�ч珮锛氬叿鍌欏挤澶х殑閷�瑾ゆ�㈡脯鑸囩尘姝ｅ姛鑳�锛屼繚璀夌郴绲�(t菕ng)鍦ㄩ棞(gu膩n)閸垫噳(y墨ng)鐢ㄤ腑鐨勭┅(w臎n)瀹氭��銆�

XC5VLX50-2FFG676I寤ｆ硾鎳�(y墨ng)鐢ㄤ簬澶氬�嬮牁(l菒ng)鍩燂細
銆�銆�1. 閫氫俊瑷�(sh猫)鍌欙細濡傜劇绶氬熀绔欍�佽矾鐢卞櫒鍜屼氦鎻涙�熶腑鐨勬��(sh霉)鎿�(j霉)鍖呰檿鐞�銆佸崝(xi茅)璀拌綁(zhu菐n)鎻涚瓑銆�
銆�銆�2. 瑕栭牷铏曠悊锛氱敤浜庨珮娓呰�栭牷绶ㄧ⒓瑙ｇ��銆佸湒鍍忓�炲挤鍙婂湒褰㈡覆鏌撱��
銆�銆�3. 閱�(y墨)鐧傝ō(sh猫)鍌欙細渚嬪�傝秴鑱叉尝鎴愬��銆丆T鎺冩弿鍎�涓�鐨勪俊铏熻檿鐞�銆�
銆�銆�4. 宸ユキ(y猫)鑷�鍕曞寲锛氶亱鍕曟帶鍒躲�佹�熷櫒浜鸿�栬�虹郴绲�(t菕ng)涓�鐨勫�︽檪鏁�(sh霉)鎿�(j霉)閲囬泦鑸囧垎鏋�銆�
銆�銆�5. 鑸�绌鸿埅澶╄垏鍦嬮槻锛氶浄閬斾俊铏熻檿鐞嗐�佸皫(d菐o)鑸�绯荤��(t菕ng)闁嬬櫦(f膩)绛夊皪鍙�闈犳�ц�佹眰妤甸珮鐨勫牬鍚�銆�
銆�銆�6. 娓�瑭︽脯閲忓剙鍣�锛氱ず娉㈠櫒銆侀牷璀滃垎鏋愬剙绛夐珮绔�娓�瑭﹁ō(sh猫)鍌欑殑鏍稿績铏曠悊鍣ㄩ儴鍒�銆�

XC5VLX50T-2FFG676I
銆�銆�XC5VLX50T-3FFG676I
銆�銆�XC5VLX330T-2FFG1136I